• Title/Summary/Keyword: 저전력 노이즈 제거

Search Result 10, Processing Time 0.025 seconds

Fast Adaptation Techniques of Compensation Coefficient of Active Noise Canceller using Binary Search Algorithm (이진 탐색 알고리즘을 이용한 능동 노이즈 제거용 보정 계수 고속 적용 기법)

  • An, Joonghyun;Park, Daejin
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.25 no.11
    • /
    • pp.1635-1641
    • /
    • 2021
  • Portable systems with built-in active noise control is required low power operation. Excessive anti noise search operation can lead to rapid battery consumption. A method that can adaptively cancel noise according to the operating conditions of the system is required and the methods of reducing power are becoming very important key feature in today's portable systems. In this paper, we propose the method of active noise control(ANC) using binary search algorithm in noisy systems. The implemented architecture detects a frequency component considered as noise from the input signal and by using the binary search algorithm, the system find out an appropriate amplitude value for anti-noise in a much faster time than the general linear search algorithm. Through the experimental results, it was confirmed that the proposed algorithm performs a successful functional operation.

Bus Encoding for Low Power and Crosstalk Delay Elimination (저전력과 크로스톡 지연 제거를 위한 버스 인코딩)

  • 여준기;김태환
    • Journal of KIISE:Computer Systems and Theory
    • /
    • v.29 no.12
    • /
    • pp.680-686
    • /
    • 2002
  • In deep-submicron (BSM) design, coupling effects between wires on the bus cause serious problems such as crosstalk delay, noise, and power consumption. Most of the previous works on bus encoding are targeted either to minimize tile power consumption on bus or to minimize the crosstalk delay, but not both. In this paper, we propose a new bus encoding algorithm that minimizes the power consumption on bus and eliminates the crosstalk delay simultaneously. We formulate and solve the problem by minimizing a weighted sum of the self transition and cross-coupled transition activities on bus From experiments using a set of benchmark designs. it is shown that the proposed encoding technique consumes at least 15% less power over the existing techniques, while completely eliminating the crosstalk delay.

A 0.18-μm CMOS Low-Power and Wideband LNA Using LC BPF Loads (광대역 LC 대역 통과 필터를 부하로 가지는 0.18-μm CMOS 저전력/광대역 저잡음 증폭기 설계)

  • Shin, Sang-Woon;Seo, Yong-Ho;Kim, Chang-Wan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.22 no.1
    • /
    • pp.76-80
    • /
    • 2011
  • This paper has proposed a 3~5 GHz low-power and wideband LNA(Low Noise Amplifier), which has been implemented in a 0.18-${\mu}m$ CMOS technology. The proposed LNA has basically the noise-cancelling topology to achieve a balun-function, wideband input matching, and relative low noise figure. In addition, it has utilized a 2nd-order LC-band-pass filter(BPF) as its output load to achieve higher power gain and lower noise figure with the lowest dc power consumption among previously reported works. The proposed amplifier consumes only 3.94 mA from a 1.8 V supply voltage. The simulation results show a power gain of more than +17 dB, a noise figure of less than +4 dB, and an input IP3 of -15.5 dBm.

A Study on Vector Control of ac motor using Low-Voltage DSP (저전압용 DSP칩을 이용한 서보 모터의 벡터제어에 관한 연구)

  • Bang, Seoung-Hyun;Choi, Chi-Young;Hong, Sun-Gi
    • Proceedings of the KIEE Conference
    • /
    • 2002.11d
    • /
    • pp.76-79
    • /
    • 2002
  • 본 논문에서는 고성능 AC 서보 모터에 대하여 제어 시스템을 구현하고, 제어기를 설계한다. 하드 웨어구성은 모터 전용 저전압 DSP칩인 TMS320LF2407 칩을 이용한다. TMS320LF2407는 최근의 저전력 구동 추세에 따라 3.3V를 구동 전압으로 이용하는 DSP 칩이다 연산 처리 속도는 40MIPS로 빠른 연산 처리능력을 가지고 있지만 주변 소자들과의 인터페이스(보통 5V로 동작)와 노이즈에 대한 대책을 고려하여야 한다. 본 논문에서는 이러한 전압 호환과 노이즈를 가능한 제거한 서보 모터 제어기를 구성하며, 또한 유효 전압 인가시간의 관점에서 바라본 개선된 공간 벡터 PWM방식을 적용함으로써 계산과정과 프로그램을 간단히 하고, 전류제어를 소프트웨어 방식으로 처리하여 복잡한 하드웨어를 간략화 시키고자 한다 이런 과정에 의하여 앞으로 요구될 수 있는 고성능 다기능을 위한 효용성을 높이고자 한다.

  • PDF

Series DC arc fault detection algorithm using time and frequency domain information (시간 및 주파수 영역 정보를 이용한 직렬 DC 아크 고장 검출 알고리즘)

  • Chae, Suyong;Park, Jinju;Park, Sukin;Han, Soobin
    • Proceedings of the KIPE Conference
    • /
    • 2015.07a
    • /
    • pp.427-428
    • /
    • 2015
  • 본 논문은 DC 배전시스템 내에서 발생할 수 있는 직렬 DC 아크 고장을 검출하기 위한 알고리즘을 제안한다. 직렬 DC 아크 고장은 동일 전위의 도선 또는 접속점의 노화 등으로 인해 발생하며, 아크 고장 에너지의 크기에 따라 수초 이내에 화재 사고를 유발할 수 있기 때문에 정확한 고장 검출을 통한 빠른 제거가 필요하다. 스위칭 전력변환 장치에서 발생하는 노이즈 성분에 의한 검출 알고리즘의 오동작 현상을 제거하기 위해 시간 영역에서의 전류 변화와 주파수 영역에서의 전류 크기 차이를 동시에 이용하여 직렬 DC 아크 고장 발생여부를 검출하게 된다. 제안 알고리즘은 5kW급 용량의 380V 저전압 DC 배전 시스템을 대상으로 검증하였다.

  • PDF

CMOS Circuit Designs for High Frequency Oscillation Proximity Sensor IC System (고주파 발진형 근접 센서 시스템의 집적화를 위한 CMOS 회로 설계)

  • Sung, Jung-Woo;Choi, Pyung
    • Journal of Sensor Science and Technology
    • /
    • v.3 no.1
    • /
    • pp.46-53
    • /
    • 1994
  • In the following paper, the high frequency oscillation proximity sensor system, one of the sensor systems used in FA, is designed using CMOS. According to the proximity of metal objects, two differing amplitudes of sinusoidal waves are set, and by using rectifiers, dc voltages, which determine the constant current source circuit's output current levels, can be abstracted from these waves. To remove any disturbances in the dc voltage levels, a schmitt trigger is used. Some advantages of this CMOS high frequency oscillation proximity sensor are miniturization, light weight and low power disspation.

  • PDF

CMOS Circuits for Multi-Sensor Interface Custom IC (멀티센서신호 인터페이스용 Custom IC를 위한 CMOS 회로 설계)

  • Jo, Young-Chang;Choi, Pyung;Sohn, Byung-Ki
    • Journal of Sensor Science and Technology
    • /
    • v.3 no.1
    • /
    • pp.54-60
    • /
    • 1994
  • In this paper, the multi-sensor signal processing IC is designed. It consists of an analog multiplexer for selection of multi-sensor signals, active filters for noise rejection and signal amplification, and a sample and hold circuit for interface with digital signal processing. By implementing these circuits with CMOS transistors, integration, low power dissipation and miniaturization of the total signal processing system have been made possible.

  • PDF

Linearization Technique for Bang-Bang Digital Phase Locked-Loop by Optimal Loop Gain Control (최적 루프 이득 제어에 의한 광대역 뱅뱅 디지털 위상 동기 루프 선형화 기법)

  • Hong, Jong-Phil
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.51 no.1
    • /
    • pp.90-96
    • /
    • 2014
  • This paper presents a practical linearization technique for a wide-band bang-bang digital phase locked-loop(BBDPLL) by selecting optimal loop gains. In this paper, limitation of the theoretical design method for BBDPLL is explained, and introduced how to implement practical BBDPLLs with CMOS process. In the proposed BBDPLL, the limited cycle noise is removed by reducing the proportional gain while increasing the integer array and dither gain. Comparing to the conventional BBDPLL, the proposed one shows a small area, low power, linear characteristic. Moreover, the proposed design technique can control a loop bandwidth of the BBDPLL. Performance of the proposed BBDPLL is verified using CppSim simulator.

Optimization Method of Kalman Filter Parameters Based on Genetic Algorithm for Improvement of Indoor Positioning Accuracy of BLE Beacon (BLE Beacon의 실내 측위 정확도 향상을 위한 Genetic Algorithm 기반 Kalman Filter Parameters 최적화 방법)

  • Kim, Seong-Chang;Kim, Jin-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.25 no.11
    • /
    • pp.1551-1558
    • /
    • 2021
  • Beacon signals used in indoor positioning system are reflected and distorted, resulting in noise signals. KF(Kalman Filter) has been widely used to remove this noise. In order to apply the KF, optimization process considering the signal type, signal strength, and environmental elements of each product is required. In this paper, we propose a solution to the optimization problem of KF Parameters using GA(Genetic Algorithm) in BLE(Bluetooth Low Energy) Beacon-based indoor positioning system. After optimizing KF Parameters by applying the proposed technique with a certain distance between Beacon and receiver, we compared the estimated distance passed through KF with the unfiltered distance. The proposed technique is expected to reduce the time required and improve accuracy of KF Parameters optimization in an indoor positioning system based on RSSI (Received Signal Strength Indication).

Adaptive Filter Design for Eliminating Baseline Wandering Noise of Electrocardiogram (심전도 기저선 흔들림 잡음 제거를 위한 적응형 필터 설계)

  • Choi, Chul-Hyung;Rahman, MD Saifur;Kim, Si-Kyung;Park, In-Deok;Kim, Young-Pil
    • The Journal of Korean Institute of Information Technology
    • /
    • v.15 no.12
    • /
    • pp.157-164
    • /
    • 2017
  • Mobile ECG signal measurement is a technique to measure small signals of several mV, and many studies have been conducted to remove noise including wandering scheme. Removal of the equipotential line noise caused by shaking or movement of the electrode cable is one of the core research contents for the electrocardiogram measurement. In this study, we proposed a modified step-size of combined NLMS(normalized least squares) and DLMS(delayed least squares) adaptive filter to eliminate baseline noise from ECG signals. The proposed method mainly adjusts initial filter step-size to reduce distortion of original ECG signals characteristic after eliminating baseline noise. The modified filter step-size is scaled by filter order size and distortion minimization factor. This method is suitable for portable ECG device with a small processor and less power consumption. This technique also decreases computation time which is essential for real-time filtering. The proposed filter also increase the signal to noise ratio (SNR) compared to conventional NLMS filter.