• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.16 no.12
• /
• pp.1313-1323
• /
• 1991

n this thesis CAM(content Addressable Memory) generator and graphic display tool for run-plot sequence in automatic generation of CAM are presented. We show that implementing the layout generation, graphic menu, mouse driver, and data structure by using the basic classes is clear and easy in modification than the conventional procedural language. For the implementation of generator which is independent of design rule or process, we use the parameterized cell so that basic cell can be changed according to user's inputs. and perform the layout by means of placement and routing using pitch mathching. Finally, the display of CIF which generated and constitution of graphic menu for total run-plot sequence are explained.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.13 no.3
• /
• pp.531-536
• /
• 2009

In this paper, we propose $256{\times}256$ pixel array fingerprint sensor with an advanced circuits for detecting. The pixel level simple detection circuit converts from a small and variable sensing current to binary voltage out effectively. We minimizes an electrostatic discharge(ESD) influence by applying an effective isolation structure around the unit pixel. The sensor circuit blocks were designed and simulated in standard CMOS $0.35{\mu}m$ process. Full custom layout is performed in the unit sensor pixel and auto placement and routing is performed in the full chip.

• Korean Journal of Optics and Photonics
• /
• v.30 no.1
• /
• pp.8-14
• /
• 2019

This paper presents methods to correct and evaluate the chromatic aberration occurring on the cut-off line of a headlamp without additional optical components and alignment process. To correct the chromatic aberration using a geometrical concept, the maximum differences in exit-ray angle between wavelengths are reduced by tilting the convex surface of an aspheric projection lens. To evaluate the chromatic aberration, the position and luminous intensity to be measured are suggested, and the criterion for chromatic aberration is presented through color coordinates. From the evaluation of an automotive headlamp designed using this geometrical method, it is found that the chromatic aberration of the cut-off line is significantly reduced.

• Resources Recycling
• /
• v.26 no.6
• /
• pp.73-83
• /
• 2017

Used small household appliances have a wide variety of product types and component materials, and contain high percentage of black plastics. However, they are not being recycled efficiently as conventional sensors such as near-infrared ray (NIR), etc. are not able to detect black plastic by types. In the present study, an automatic sorting system was developed based on laser-induced breakdown spectroscopy (LIBS) to promote the recycling of waste plastics. The system we developed mainly consists of sample feeder, automatic position recognition system, LIBS device, separator and control unit. By applying laser pulse on the target sample, characteristic spectral data can be obtained and analyzed by using CCD detectors. The obtained data was then treated by using a classifier, which was developed based on artificial intelligent algorithm. The separation tests on waste plastics also were carried out by using a lab-scale automatic sorting system and the test results will be discussed. The classification rate of the radial basis neural network (RBFNNs) classifier developed in this study was about > 97%. The recognition rate of the black plastic by types with the automatic sorting system was more than 94.0% and the sorting efficiency was more than 80.0%. Automatic sorting system based on LIBS technology is in its infant stage and it has a high potential for utilization in and outside Korea due to its excellent economic efficiency.

• Journal of Sensor Science and Technology
• /
• v.6 no.2
• /
• pp.137-144
• /
• 1997

In this paper, the design of a 10-bit 40-MS/s pipelined A/D converter is implemented to achieve low static power dissipation of 70 mW at the ${\pm}2.5\;V$ or +5 V power supply environment for high speed applications. A 1.5 b/stage pipeline architecture in the proposed ADC is used to allow large correction range for comparator offset and perform the fast interstage signal processing. According to necessity of high-performance op amps for design of the ADC, the new op amp with gain boosting based on a typical folded-cascode architecture is designed by using SAPICE that is an automatic design tool of op amps based on circuit simulation. A dynamic comparator with a capacitive reference voltage divider that consumes nearly no static power for this low power ADC was adopted. The ADC implemented using a $1.0{\mu}m$ n-well CMOS technology exhibits a DNL of ${\pm}0.6$ LSB, INL of +1/-0.75 LSB and SNDR of 56.3 dB for 9.97 MHz input while sampling at 40 MHz.

• Journal of the Korea Society of Computer and Information
• /
• v.28 no.10
• /
• pp.171-178
• /
• 2023

In this paper, we propose a smart automated warehouse to maximize space utilization. Previous elevator-type automatic warehouses were designed with a maximum payload of 100kg on trays, which has the problem of extremely limiting the number of pallets that can be loaded within the space. In this paper, we design a smart warehouse that can maximize space utilization with a maximum vertical stiffness of 300kg. As a result of the performance evaluation of the implemented warehouse, the maximum payload was 500.6kg, which satisfied the original design and requirements, the lifting speed was 0.5m/s, the operating noise of the device was 67.1dB, the receiving and forwarding time of the pallet was 36.92sec, the deflection amount was 4mm, and excellent performance was confirmed in all evaluation items. In addition, the PLC control method, which designs the control UI and control panel separately, was integrated into the PC system to improve interoperability and maintainability with various process management systems. In the future, we plan to develop it into a fully automatic smart warehouse by linking IoT sensor-based logistics robots.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
• /
• v.10 no.5
• /
• pp.359-363
• /
• 2017

The LED (Liquid Emitting Diode) frame device is a big part of the representative display industry in Korea. LED is an essential part for TV, monitor, notebook, and mobile phone. In Japan, Taiwan, China and other countries, investment in LEDs has been strengthened, and productivity has become an important issue. However, as the size of the parts becomes smaller, the inconsistent inspection by the human eye becomes a problem of reliability, so that the automatic inspection process becomes an essential issue in the field of LED module inspection. In this paper, we investigate defects in visual inspection process using computer vision technology. The inspection of the LED frame is made quickly and accurately, thereby improving the efficiency of the process and shortening the inspection time. As a result of applying the inspection system to the field, we confirmed that it is possible to inspect quickly and accurately.

• Transactions of the Korean Society of Mechanical Engineers A
• /
• v.34 no.4
• /
• pp.423-430
• /
• 2010

Hot closed-forging process and the die used for forming an automotive flange were analyzed from the viewpoints of heat transfer, grain-flow lines, and stresses to obtain a forged product without defects such as surface cracks, laps, cold shots, and partial filling. The forging process including up-set, pre-forging, final forging and pressing forces was investigated using finite element analysis. The influence of the preform die and the ratio of the heights of the upper die to lower die on the forging process and die were investigated and a die shape ($10^{\circ}$ for the preform die, and 1.5:1 ratio for the final die) suitable to achieve successful forging was determined on the basis of a parametric study. All parametric design requirements such as strength, full filling, and a load limit of 13,000 KN were satisfied for this newly developed flange die. New dies and flanges were fabricated and investigated. Defects such as partial filling and surface cracks were not observed.

• Journal of Convergence for Information Technology
• /
• v.9 no.1
• /
• pp.116-122
• /
• 2019

In recent years, small and medium-sized businesses are rapidly changing to an industrial structure where process/quality/energy data aggregates can be automatically or real-time to achieve global competitiveness. In particular, real-time information analysis produced in the production process of small businesses is evolving into a new process process that analyzes, predicts, prescribes and implements significant performance of small businesses. In this paper, we propose a platform-building model that can transform the automated production information system of small businesses into big data so that they can upgrade data that is generated by small businesses. The proposed model has the capability to support operational efficiency (consulting and training) and strategic decision making of small businesses by utilizing a variety of data on the basic information of products produced by small businesses for data collection by smart SMEs. In addition, the proposed model is characterized by close cooperation between small and medium-sized businesses with different regional characteristics and areas of information sharing and system linkage.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.47 no.2
• /
• pp.94-99
• /
• 2010

This paper presents a charge pump architecture for correcting the current mismatch due to the PVT variation. In general, the current mismatch of the charge pump should be minimized to improve the phase noise and spur performance of the PLL. In order to correct the current mismatch of the charge pump, the current difference is detected by the replica charge pump and fed back into the main charge pump. This scheme is very simple and guarantees the high accuracy compared with the prior works. Also, it shows a good dynamic performance because the mismatch is corrected continuously. It is implemented in 0.13um CMOS process and the die area is $100{\mu}m\;{\times}\;160{\mu}m$. The voltage swing is from 0.2V to 1V at supply voltage of 1.2V. The charging and discharging currents are $100{\mu}A$, respectively and the current mismatch due to the PVT variation is less than 1%.