• Title/Summary/Keyword: 연산 효율

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An efficient Authentication and Key Agreement Protocol in Mobile Systems (이동 시스템에서의 효율적인 인증 및 키 교환 프로토콜)

  • 최영근;김순자
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.11 no.2
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    • pp.73-82
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    • 2001
  • In this paper we propose an efficient authentication and key agreement protocol which has been designed specifically for use with low powered computationally weak equipment such as Cellular phone and PDA(Personal Digital Assistant). Imple-menting the protocol based on the Rabin cryptosystem provides the efficiency requirements for mobile communications including minimum number of passes and low computational lead. The paper outlines the new protocol, examines it s various aspects, and compares them to those representative authentication and key agreement protocols.

A Fast Multiplication Method for Elliptic Curves defined on small finite fields (작은 유한체 위에 정의된 타원곡선의 고속연산 방법)

  • 박영호;정수환
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.12 no.5
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    • pp.45-51
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    • 2002
  • As Koblitz curve, the Frobenius endomorphism is know to be useful in efficient implementation of multiplication on non-supersingular elliptic cures defined on small finite fields of characteristic two. In this paper a method using the extended Frobenius endomorphism to speed up scalar multiplication is introduced. It will be shown that the proposed method is more efficient than Muller's block method in [5] because the number of point addition for precomputation is small but on the other hand the expansion length is almost same.

Efficient Super-Resolution of 2D Smoke Data with Optimized Quadtree (최적화된 쿼드트리를 이용한 2차원 연기 데이터의 효율적인 슈퍼 해상도 기법)

  • Choe, YooYeon;Kim, Donghui;Kim, Jong-Hyun
    • Proceedings of the Korean Society of Computer Information Conference
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    • 2021.01a
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    • pp.261-264
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    • 2021
  • 본 논문에서는 SR(Super-Resolution)을 계산하는데 필요한 데이터를 효율적으로 분류하고 분할하여 빠르게 SR연산을 가능하게 하는 쿼드트리 기반 최적화 기법을 제안한다. 제안하는 방법은 입력 데이터로 사용하는 연기 데이터를 다운스케일링(Downscaling)하여 쿼드트리 연산 소요 시간을 감소시키며, 이때 연기의 밀도를 이진화함으로써, 다운스케일링 과정에서 밀도가 손실되는 문제를 피한다. 학습에 사용된 데이터는 COCO 2017 Dataset이며, 인공신경망은 VGG19 기반 네트워크를 사용한다. 컨볼루션 계층을 거칠 때 데이터의 손실을 막기 위해 잔차(Residual)방식과 유사하게 이전 계층의 출력 값을 더해주며 학습한다. 결과적으로 제안하는 방법은 이전 결과 기법에 비해 약15~18배 정도의 속도향상을 얻었다.

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Design and Analysis of a $AB^2$ Systolic Arrays for Division/Inversion in$GF(2^m)$ ($GF(2^m)$상에서 나눗셈/역원 연산을 위한 $AB^2$ 시스톨릭 어레이 설계 및 분석)

  • 김남연;고대곤;유기영
    • Journal of KIISE:Computer Systems and Theory
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    • v.30 no.1
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    • pp.50-58
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    • 2003
  • Among finite field arithmetic operations, the $AB^2$ operation is known as an efficient basic operation for public key cryptosystems over $GF(2^m)$,Division/Inversion is computed by performing the repetitive AB$^2$ multiplication. This paper presents two new $AB^2$algorithms and their systolic realizations in finite fields $GF(2^m)$.The proposed algorithms are based on the MSB-first scheme using standard basis representation and the proposed systolic architectures for $AB^2$ multiplication have a low hardware complexity and small latency compared to the conventional approaches. Additionally, since the proposed architectures incorporate simplicity, regularity, modularity, and pipelinability, they are well suited to VLSI implementation and can be easily applied to inversion architecture. Furthermore, these architectures will be utilized for the basic architecture of crypto-processor.

Implementation of H.264/AVC Deblocking Filter on 1-D CGRA (1-D CGRA에서의 H.264/AVC 디블록킹 필터 구현)

  • Song, Sehyun;Kim, Kichul
    • Journal of IKEEE
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    • v.17 no.4
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    • pp.418-427
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    • 2013
  • In this paper, we propose a parallel deblocking filter algorithm for H.264/AVC video standard. The deblocking filter has different filter processes according to boundary strength (BS) and each filter process requires various conditional calculations. The order of filtering makes it difficult to parallelize deblocking filter calculations. The proposed deblocking filter algorithm is performed on PRAGRAM which is a 1-D coarse grained reconfigurable architecture (CGRA). Each filter calculation is accelerated using uni-directional pipelined architecture of PRAGRAM. The filter selection and the conditional calculations are efficiently performed using dynamic reconfiguration and conditional reconfiguration. The parallel deblocking filter algorithm uses 225 cycles to process a macroblock and it can process a full HD image at 150 MHz.

A Note on the Use of Properties of Operations and the Equal Sign in Elementary School Mathematics (초등학교 수학에서 연산의 성질과 등호의 사용에 대한 고찰)

  • Paek, Dae Hyun
    • Journal of Elementary Mathematics Education in Korea
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    • v.21 no.4
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    • pp.643-662
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    • 2017
  • The first appearance of the equations in elementary school mathematics is in the expression of the equal sign in the addition sentences without its definition. Most elementary school students have operational understanding of the equal sign in equations. Moreover, students' opportunities to have a clear concept of the properties of operations are limited because they are used implicitly in the textbooks. Based on this fact, it has been argued that it is necessary to introduce the properties of operations explicitly in terms of specific numbers and to deal with various types of equations for understanding a relational meaning of the equal sign. In this study, we use equations to represent the implicit properties of operations and the relational meaning of the equal sign in elementary school mathematics with respect to students' level of understanding. In addition, we give some explicit examples which show how to apply them to make efficient computations.

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Hardware Design of Efficient SAO for High Performance In-loop filters (고성능 루프내 필터를 위한 효율적인 SAO 하드웨어 설계)

  • Park, Seungyong;Ryoo, Kwangki
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2017.10a
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    • pp.543-545
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    • 2017
  • This paper describes the SAO hardware architecture design for high performance in-loop filters. SAO is an inner module of in-loop filter, which compensates for information loss caused by block-based image compression and quantization. However, HEVC's SAO requires a high computation time because it performs pixel-unit operations. Therefore, the SAO hardware architecture proposed in this paper is based on a $4{\times}4$ block operation and a 2-stage pipeline structure for high-speed operation. The information generation and offset computation structure for SAO computation is designed in a parallel structure to minimize computation time. The proposed hardware architecture was designed with Verilog HDL and synthesized with TSMC chip process 130nm and 65nm cell library. The proposed hardware design achieved a maximum frequency of 476MHz yielding 163k gates and 312.5MHz yielding 193.6k gates on the 130nm and 65nm processes respectively.

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Scalable Hierarchical Group Key Establishment using Diffie-Hallman Key Exchange (Diffie-Hallman 키 교환을 이용한 확장성을 가진 계층적 그룹키 설정 프로토콜)

  • 박영희;정병천;이윤호;김희열;이재원;윤현수
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.13 no.5
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    • pp.3-15
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    • 2003
  • The secure group communication enables the members, which belong to the same group, to communicate each other in a secure and secret manner. To do so, it is the most important that a group key is securely distributed among them and also group membership is efficiently managed. In detail, the generation, the distribution and the refreshment of a group key would be highly regarded in terms of low communication and computation complexity. In this paper, we show you a new protocol to generate a group key which will be safely shared within a group, utilizing the 2-party Diffie-Hellman key exchange protocol and the complete binary tree. Our protocol has less complexity of computation per group member by substituting many parts of exponentiation computations for multiplications. Consequently, each group member needs constant computations of exponentiation and multiplication regardless of the group size in the protocol and then it has less complexity of the computation than that of any other protocols.

DPA-Resistant Low-Area Design of AES S-Box Inversion (일차 차분 전력 분석에 안전한 저면적 AES S-Box 역원기 설계)

  • Kim, Hee-Seok;Han, Dong-Guk;Kim, Tae-Hyun;Hong, Seok-Hie
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.19 no.4
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    • pp.21-28
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    • 2009
  • In the recent years, power attacks were widely investigated, and so various countermeasures have been proposed, In the case of block ciphers, masking methods that blind the intermediate values in the algorithm computations(encryption, decryption, and key-schedule) are well-known among these countermeasures. But the cost of non-linear part is extremely high in the masking method of block cipher, and so the inversion of S-box is the most significant part in the case of AES. This fact make various countermeasures be proposed for reducing the cost of masking inversion and Zakeri's method using normal bases over the composite field is known to be most efficient algorithm among these masking method. We rearrange the masking inversion operation over the composite field and so can find duplicated multiplications. Because of these duplicated multiplications, our method can reduce about 10.5% gates in comparison with Zakeri's method.

Baseline Wander Removing Method Based on Morphological Filter for Efficient QRS Detection (효율적인 QRS 검출을 위한 형태 연산 기반의 기저선 잡음 제거 기법)

  • Cho, Ik-Sung;Kim, Joo-Man;Kim, Seon-Jong;Kwon, Hyeog-Soong
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.1
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    • pp.166-174
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    • 2013
  • QRS detection of ECG is the most popular and easy way to detect cardiac-disease. But it is difficult to analyze the ECG signal because of various noise types. The important problem in recording ECG signal is a baseline wandering, which is occurred by rhythm of respiration and muscle contraction attaching to an electrode. Particularly, in the healthcare system that must continuously monitor people's situation, it is necessary to process ECG signal in realtime. In other words, the design of algorithm that exactly detects QRS region using minimal computation by analyzing the person's physical condition and/or environment is needed. Therefore, baseline wander removing method based on morphological filter for efficient QRS detection method is presented in this paper. For this purpose, we detected QRS through the preprocessing method using morphological filter, adaptive threshold, and window. The signal distortion ratio of the proposed method is compared with other filtering method. Also, R wave detection is evaluated by using MIT-BIH arrhythmia database. Experiment result show that proposed method removes baseline wanders effectively without significant morphological distortion.