• Smart Media Journal
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• v.7 no.1
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• pp.31-36
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• 2018

In this paper, we propose automatic screen on / off method of OST-HMD screen using gaze depth estimation technique. The proposed method uses MLP (Multi-layer Perceptron) to learn the user's gaze information and the corresponding distance of the object, and inputs the gaze information to estimate the distance. In the learning phase, eye-related features obtained using a wearable eye-tracker. These features are then entered into the Multi-layer Perceptron (MLP) for learning and model generation. In the inference step, eye - related features obtained from the eye tracker in real time input to the MLP to obtain the estimated depth value. Finally, we use the results of this calculation to determine whether to turn the display of the HMD on or off. A prototype was implemented and experiments were conducted to evaluate the feasibility of the proposed method.

• The Journal of the Korea Contents Association
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• v.10 no.12
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• pp.10-17
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• 2010

In this paper, we design digital D-PHY link chip controling DSI (Display Serial Interface) that meets MIPI (Mobile Industry Processor Interface) standard. The D-PHY supports a high-speed (HS) mode for fast data traffic and a low-power (LP) mode for control transactions. For low power consumption, the unit blocks in digital D-PHY are optionally switched using the clock gating technique. The proposed low power digital D-PHY is simulated and compared with conven tional one about power consumption on each transaction mode. As a result, power consumptions of TX, RX, and total in HS mode decrease 74%, 31%, and 50%, respectively. In LP mode, power reduction rates of TX, RX, and total are 79%, 40%, and 51.5%, separately. We implemented the low power MIPI D-PHY digital chip using $0.13-{\mu}m$ CMOS process under 1.2V supply.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.13 no.5
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• pp.239-247
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• 2013

In network based on multi-interface, there are needed channel assignment strategy that reduce interference and improve bandwidth efficiency by assigning each interface to available channels in order to utilize effectively multiple wireless interfaces on each node. MCS protocol had been proposed, which improve capacity and throughput of network by using hybrid assignment. MCS uses as the criterion to assign channel the number of node that use the same channel in contention area. but there have an problem that this information exactly does not reflect actually offered channel load. in this paper, we proposes CAMCS protocol to assign channel by that the channel busy degree to indicate the occupancy rate of channel by nodes as well as the number of nodes that use the same channel in inference area is used as criterion for estimation channel load, and conform performance improvement effect by simulation.

• Journal of IKEEE
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• v.24 no.1
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• pp.260-268
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• 2020

This paper presents the high frequency resonant inverter of class D SEPP(Single-Ended Push Pull) type using LS-ZVS-LSTC, which can reduce the switching losses during the turn-on and turn-off switching time. The analysis of high frequency resonant inverter using LS-ZVS-LSTC(Low-loss Turn-off Snubber Capacitor) proposed in this paper is described in general by adopting the normalized parameters. The operating characteristics of the proposed high frequency resonant inverter were also evaluated by using the control parameters such as the normalized control frequency(μ), the normalized load time constant(τ), the coupling factor(κ) and so on. Based on the characteristic values through the characteristics of evaluation, an example of the design method of the 1.8[kW] class D SEPP type high frequency inverter is suggested, and the validity of the theoretical analysis is verified using the experimental data.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.8
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• pp.1663-1668
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• 2005

There have been numerous researches regarding the QoS guarantee in packet switching networks. IntServs, based on a signaling mechanism and scheduling algorithms, suggesting promising solutions, yet has the crucial complexity problem so that not enough real implementations has been witnessed. Flow aggregation is suggested recently to overcome this issue. In order to aggregated flows fairly so that the latency of the aggregated flows is bound, however, a non-work conserving scheduler is necessary, which is not very popular because of its another inherent complexity. We suggest a non-work conserving scheduler, the Round Robin with Virtual Flow (RRVF), which is a variation of the popular Deficit Round Robin (DRR). We study the latency of the RRVF, and observe that the non-work conserving nature of the RRVF yields a slight disadvantage in terms of the latency, but after the aggregation the latency is greatly reduced, so that e combined latency is reduced. We conclude that the flow aggregation through RRVF can actually reduce the complexity of the bandwidth allocation as well as the overall latency within a network.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.411-414
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• 2011

This paper describes a tripple-mode DC-DC buck converter with DPSS Fucntion. The DC-DC buck converter operate in PWM(Pulse Width Modulation) mode at moderate to heavy loads(80mA~500mA), in PFM(Pulse Frequency Modulation)at light loads(1mA~80mA), and in LDO(Low Drop Out) mode at the sleep mode(<1mA). In PFM mode DPSS(Dynamic Partial Shutdown Strategy) is also employed to increase the efficiency at light loads. The triple-mode converter can thus achieve high efficiencies over wide load current range. The proposed DC-DC converter is designed in a CMOS 0.18um technology. It has a maximum power efficiency of 97.02% and maximum output current of 500mA. The input and output voltages are 3.3V and 2.5V, respectively. The chip size is $1465um{\times}895um$ including pads.

• The Transactions of the Korean Institute of Power Electronics
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• v.7 no.1
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• pp.65-73
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• 2002

This paper proposes a new carrier-based PWM method to solve the most serious problem of flying capacitor multi-level inverter that is the unbalance of capacitor voltages. The voltage unbalance occurs due to the difference of each capacitor's charging and discharging time applied to Flying Capacitor Inverter. New solution controls the variation of capacitor voltages into the mean '0'during some period by means of new carriers using the leg voltage redundancy in the flying capacitor inverter. The solution can be easily expanded to the multi-level inverter. The leg voltage redundancy in the new method makes the switching loss of device equals to the conduction loss of device. This paper will examine the unbalance of capacitor voltage and the conventional theory of self-balance using Phase-shifted carrier. And then the new method that is suitable to the flying capacitor inverter will be explained.

• The Transactions of the Korean Institute of Power Electronics
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• v.15 no.4
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• pp.296-308
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• 2010

This paper proposes a design of the three-parallel converter system and grid-connection technique for a PMSG based wind turbine systems. The back-to-back converter of the PMSG based wind turbine system is directly connected to the grid so that both the power devices and the filters are needed to have large power ratings. The three-parallel converter configuration can reduce the required power ratings of the devices and filters. However, the three-parallel converter can cause circulating currents. These circulating currents can be suppressed by sellecting proper inner inductance at each leg. An LCL filter design is used to meet the THD regulations. The latent resonance caused by the LCL filter is compensated by an active damping method without additional loss. The decline of the power quality caused by the unbalanced and distorted grid voltages is also compensated with an additional compensation algorithm. The simulation and experimental results show that the proposed system and compensation methods are effective for the wind turbine systems.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.30 no.1
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• pp.55-65
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• 2016

This paper proposed a new control method which is capable of controlling circulating current considering current capacity of switching device. In the unbalanced voltage conditions, active power and reactive power have double line frequency. Thus, in order to provide active power without ripple, it is necessary to inject the negative sequence current components. However, when the negative current components is injected, it increases the total current flowing in the Arm, and in the Sub-module(SM) the current more than rated is impressed, which leads to destroy the system. Also, in impressing the circulating current reference of each arm, conventional control method impressed applicable $i_{dck}/3$ in the case of balanced voltage conditions. In the case of unbalanced conditions, as arm circulating current of three phase show difference due to the power impressed to each arm, reference of each arm is not identical. In this study, in the case of unbalanced voltage, within permitted current, the control method to decrease the ripple of active power is proposed, through circulating current control and current limitations. This control method has the advantage that calculates the maximum active power possible to generate capacity and impressed the current reference for that much. Also, in impressing circulating current reference, a new control method proposes to impress the reference from calculating active power of each phase. The proposed control method is verified through the simulation results, using the PSCAD/EMTDC.

• Journal of Korea Multimedia Society
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• v.16 no.1
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• pp.75-86
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• 2013

This paper presents a technique to implement embedded systems using interrupts of the one-chip microcontroller with many peripherals based on a multiple finite state machines model. The multiple finite state machine model utilizes the structure of FSMD used for hardware design and the features of flow control by interrupts. The main finite state machine corresponds to the main program and the sub-state machines corresponds to the interrupt subroutines. Therefore, interrupts from the peripherals can be processed immediately in the sub-state machines. The request and reply variables are used to interface between the finite state machines. Additional operating system is not necessary for the context switching between the main state machine and the sub-state machine, because the flow-control caused by interrupt can be replaced with the switching. An embedded system modeled on multiple finite state machine with ASM charts can be easily implemented by the conversion of ASM charts into C-language programs. This implementation technique can be easily adopted to the hardware oriented embedded systems because of the detail description of the model and the fast response to the interrupt events in the sub-state machine.