• Proceedings of the Korean Society of Computer Information Conference
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• 2024.01a
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• pp.331-334
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• 2024

하이퍼레저 패브릭(Hyperledger Fabric)은 참여자의 신원을 확인하고, 정보교환(트랜잭션)의 유효성을 검증하는 허가형 블록체인 모델이다. 기존의 대표적인 블록체인 모델인 비트코인, 이더리움과 대비하여 효율적인 데이터 검증 방안이 가능한대, 체인코드와 채널, 그리고 피어를 중심으로 구성되어 있기 때문이다. 먼저 본 블록체인 모델은 '체인코드'라는 스마트 계약(컨트랙트)를 실행하며 허가된 사용자만 네트워크에 참여할 수 있다. 또한, '채널' 기능이 있어 서로 다른 조직 간의 데이터 공유와 검증에 대한 새로운 접근방식을 보여줄 수 있으며, 특정 네트워크 내에서 데이터를 분리할 수 있다. 이를 통해 특정 데이터에 대한 접근권한을 제어하는 기능을 제공하며 동시에 데이터의 신뢰성과 보안성을 높일 수 있다. 마지막으로 '피어'는 체인코드를 통해 들어온 트랜잭션을 검증하고, 유효한 데이터만 원장에 추가하는 기법으로 무결성을 유지하는 데 중요한 역할 담당하고 있다. 본 연구결과를 기반으로 하이퍼레저 패브릭을 효과적으로 활용하여 데이터 검증 프로세스가 산업계에 널리 적용될 수 있기를 기대한다.

• 한국정보교육학회:학술대회논문집
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• 2021.08a
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• pp.303-308
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• 2021

In this study, we intended to present a class design plan that combines safety education and software education, which are very important in the school field, but are considered necessary for change. In order to realize safety education centered on indirect experience, the 12th class plan was devised as a "Smart Safety Commuter Road Production Project" using a physical computing tool called Bitbrick. Based on the 12th city's class plan, qualitative research was conducted with interviews with a total of five teachers, showing both the effectiveness and problems of applying them to the class. The effectiveness is that unlike conventional delivery-type safety education, indirect experience-oriented safety education centered on real-life situations is possible, and it can be expected that procedural thinking skills can be developed along with stimulating interest. However, the problem has been shown that the process of implementing the direct situation can be challenging and that even activities can be more efficient than group activities.

• 한국정보교육학회:학술대회논문집
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• 2021.08a
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• pp.131-139
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• 2021

In the newly revised curriculum, it is aimed to raise student who has creativity and convergence ability with computational thinking. Based on the analysis of revised curriculum including software education in elementary school, this study proposed educational program that can be applied in actual school field, considering various factors. This educational program using Bitbrick was conducted by 50 students in fifth grade that consist of 23 students in Seoul and 27 students in Gyeonggido during five weeks in 17 periods. The purpose of this study is to verify the effect of application of software education program in terms of computational thinking ability and problem solving ability. The effect was verified after comparing the result of pre-test and post-test through T-test. So, this study obtained improvement of computational thinking and problem solving ability.

• Proceedings of the Korean Information Science Society Conference
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• 2002.10e
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• pp.127-129
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• 2002

NP Forum에서는 다양한 밴더의 네트워크 프로세서와 스위치 패브릭간에 물리적 인터페이스를 제공하기 위해 CSIX-L1(Common Switch Interface-Level 1 )인터페이스를 표준화하였다. IBM 네트워크 프로세서는 MPLS 및 VPN, VLAN, Security, Ipv6와 같은 다양한 어플리케이션과 TBI. SMII CMII. POS bus등 다양한 가입자 인터페이스를 지원하며, L2 기 반에서 2.5Gbps 이상의 패킷 처리를 수행하기 때문에 많은 시스템에 사용된다. 그러나 IBM네트워크 프로세서는 스위치 인터페이스로 DASL인터페이스를 사용한다. 따라서 DASL인 터페이스와 CSIX-L1 인터페이스를 정합하기 위해서는 IBM UDASL칩을 이용해 DASL인 터페이스를 UTOPIA-L3인터페이스로 변환해야 하며, 이것을 다시 CSIX-L1인터페이스로 변환해야 한다. 따라서 본 논문에서는 UTOPIA-L3인터페이스 패킷과 CSIX-L1인터페이스 프레임을 상호 변환하는 모듈을 설계하였으며, 32비트 데이터 버스와 최대 125MHz로클록을 사용해 최대 4Gbps의 패킷처리를 제공하도록 구현하였다. 또한 스위치 패브릭의 특정 포트에서 과잉 트래픽 전달로 인해 발생할 수 있는 블로킹을 방지하기 위해 네트워크 프로세서에게 3개의 Priority／최대 64개 포트수의 VOQ(Virtual Output Queue)를 제공하는 기법에 대해서 기술한다.

• Journal of Internet Computing and Services
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• v.5 no.3
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• pp.45-56
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• 2004

In this paper, we propose ATM switch architecture including ALL type 2 switch which can efficiently transmit low-bit rate data, even if the network has many endpoints. We simulate the architecture of ATM switch fabric that is modeled in computer program and analyze the performance according to offered loads. ATM switch proposed in this paper can support cell switching for all types of m cells which consist of ALL type 1. ALL type 2, ALL type 3/4 and ALL type 5 cells. We propose two switch fabric methods; One supports the ALL type 2 cell processing per input port, the other global ALL type 2 cell processing for every input port. The simulation results show that the latter is superior to the former. But the former has a merit for easy implementation and extensibility. In this paper, the AAL Type 2 switch module which adapts the former method is designed using VHDL language and implemented in FPGA chip. The designed AAL Type 2 switch module operates at 52MHz. The proposed ATM switch fabric is widely applicable to mobile communication, narrow band services over ATM network and wireless ATM as well as general ATM switching fabric.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.3B
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• pp.209-216
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• 2003

In this paper, we propose ATM switch structure including AAL type 2 switch which can efficiently transmit low-bit rate data, even if the network has many endpoints. We simulate the architecture of ATM switch fabric that is modeled in computer program and analyze the performance according to offered loads. ATM switch proposed in this paper can support cell switching for all types of AAL cells which consist of AAL type 1, AAL type 2, AAL type 3/4, and AAL type 5 cells. We propose two switch fabric methods; One supports the AAL type 2 cell processing per input port, the other global AAL type 2 cell processing for every input port. The simulation results show that the latter is superior to the former. But the former has a merit for easy implementation and extensibility. The proposed ATM switch fabric is widely applicable to mobile communication, narrow band services over ATM network and wireless ATM as well as general ATM switching fabric.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.05a
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• pp.394-397
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• 2003

In this paper, we describe the implementation of high performance buffer manager that is used in an advanced input-queued switch fabric. The designed buffer manager provides wire-speed cell/packet routing with low cost and tolerates the transmission pipeline latency of request and grant data. The buffer manager is implemented in a FPGA chip and supports the speed of OC-48c, 2.5Gbps per port.

• Journal of Internet Computing and Services
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• v.20 no.6
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• pp.105-117
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• 2019

Bitcoin, which can be classified as a cryptocurrency, has attracted attention from various industries because it is an innovative digital currency and the beginning of a Blockchain system. However, as the research on Bitcoin progressed, several security vulnerabilities and possible attacks were analyzed. Among them, the security problem caused by the transparency of the Blockchain database prevents the Blockchain system from being applied to various fields. This vulnerability is further classified as the weak anonymity of participating nodes and privacy problem due to disclosure of transaction details. In recent years, several countermeasures have been developed against these vulnerabilities. In this paper, we first describe the main features of the public and private Blockchain, and explain privacy, unlinkability and anonymity. And, three public Blockchain platforms, Dash, Zcash and Monero which are derived from Bitcoin, and Hyperledger Fabric which is a private Blockchain platform, are examined. And we analyze the operating principles of the protocols applied on each platform. In addition, we classify the applied technologies into anonymity and privacy protection in detail, analyze the advantages and disadvantages, and compare the features and relative performance of the platforms based on the computational speed of the applied cryptographic mechanisms.