• Journal of the Microelectronics and Packaging Society
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• v.26 no.3
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• pp.15-22
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• 2019

In these days, importance of the power electronic devices and modules keeps increasing due to electric vehicles and energy saving requirements. However, current silicon-based power devices showed several limitations. Therefore, wide band gap (WBG) semiconductors such as SiC, GaN, and $Ga_2O_3$ have been developed to replace the silicon power devices. WBG devices show superior performances in terms of device operation in harsh environments such as higher temperatures, voltages and switching speed than silicon-based technology. In power devices, the reliability of the devices and module package is the critically important to guarantee the normal operation and lifetime of the devices. In this paper, we reviewed the recent trends of the power devices based on WBG semiconductors as well as expected future technology. We also presented an overview of the recent package module and fabrication technologies such as direct bonded copper and active metal brazing technology. In addition, the recent heat management technologies of the power modules, which should be improved due to the increased power density in high temperature environments, are described.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.10a
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• pp.461-464
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• 2009

The conventional electro-mechanical circuit break and relay are widely used in large-sized DC power system. However, recently due to high reliability, remote controllability and small power dissipation of a RSPC (Remote Solid State Power Controller), high-friendly DC power systems have increasingly adopted the RSPC as an essential element. In this paper, we have conducted the modeling of a RSPC circuit and the simulation analysis for $I^2t$ curve, respectively.

• Journal of IKEEE
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• v.22 no.4
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• pp.1202-1205
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• 2018

In this paper, we proposed ggNMOS based on 4H-SiC material and analyzed its electrical characteristics. 4H-SiC is a wide band-gap meterial, which is superior in area contrast and high voltage characteristics to Si material, and is attracting attention in the power semiconductor field. The proposed device has high robustness and strong snapback characteristics. The process consisted of SiC process and electrical characteristics were analyzed by TLP measurement equipment.

• Journal of IKEEE
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• v.23 no.1
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• pp.68-73
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• 2019

This paper presents a novel fast shut-down scheme for Buck converter by using a coupled inductor. Generally, a controller for Buck converter stops generating PWM patterns in various fault cases: Overcurrent, Short circuit, or Overvoltage, but the inductor and capacitor keep supplying their stored energy to loads although the switching operations in Buck converter stopped. The stored energy in the inductor and capacitor could cause electrical stresses on breakers and safety problems. The main idea of the proposed fast shutdown scheme is to demagnetize the inductor core by using a coupled inductor, and its performance and operations are verified by using PSIM Simulation.

• The Transactions of the Korean Institute of Power Electronics
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• v.27 no.3
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• pp.221-227
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• 2022

The reliability improvement of PV systems is an important factor in reducing the cost of PV energy because it is closely related to the annual energy production as well as the maintenance cost of PV systems. The reliability of PV inverters plays a key role in the reliability of PV systems because it is regarded as one of the most reliable critical parts of PV systems. The lifetime evaluation of PV inverters considering the mission profile in the design phase plays an important role in reliability design to ensure the required lifetime of PV inverters. In this paper, the lifetime of representative single-phase T-type and I-type NPC inverters are comparatively evaluated by considering the mission profile of a PV system recorded at Iza, Spain. Furthermore, the effect of the pulse width modulation methods on the lifetime is also discussed. The lifetime evaluation of PV inverters is performed at the component-level first and then the system level by considering all power devices.

• Journal of the Korean institute of surface engineering
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• v.55 no.5
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• pp.247-260
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• 2022

Since the first report on ferroelectricity in Si-doped hafnia (HfO2), this emerging ferroelectrics have been considered promising for the next-generation semiconductor devices with their characteristic nonvolatile data storage. The robust ferroelectricity in the sub-10-nm thickness regime has been proven by numerous research groups. However, extending their scalability below the 5 nm thickness with low temperature processes compatible with the back-end-of-line technology. In this review, therefore, the current status, technical issues, and their potential solutions of atomic layer deposition (ALD) of HfO₂-based ferroelectrics are comprehensively reviewed. Several technical issues in the physical scaling of the ferroelectric thin films and potential solutions including advanced ALD techniques including discrete feeding ALD, atomic layer etching, and area selective ALD are introduced.

• Progress in Superconductivity and Cryogenics
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• v.9 no.3
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• pp.57-61
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• 2007

The current limiting characteristics of hybrid SFCL with additional power electronic devices was investigated in order to improve operation reliabilities. The hybrid SFCL developed consists of a superconducting trigger (S/T) part, a fast switch (F/S) module and a current limiting (C/L) part. Although hybrid SFCL had shown a excellent current limiting characteristics, this device was rather vulnerable to the residual arc currents which could exist during fast switch operation. This undesirable arc should be extinguished as quickly as possible in order to implement perfect fault current commutation. So, in order to eliminate the residual arcs between fast switch contacts, the power electronic devices (IGBT or GTO) were connected in series between the S/T part and the interrupter of the F/S module. According to the fault tests conducting with an input voltage of $270\;V_{rms}$ and a fault current of $5\;kA_{rms}$, The power electronic devices could perfectly remove the arc generated between the contacts of the interrupter within 4 ms after the fault occurred. From the test analysis, it was confirmed that the hybrid SFCL could enhance the operation reliability by adopting additional power electronic devices.

• Proceedings of the KIPE Conference
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• 2020.08a
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• pp.271-273
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• 2020

SiC 기반의 전력용 반도체 소자들은 스위칭 속도가 빠르고 높은 차단 전압을 가져 dv/dt가 크다. 중전압 이상에서 게이트 드라이버에 절연된 전원 공급을 하기 위해 소형 변압기가 사용된다. 하지만 변압기의 1, 2 차 권선 사이에 수십 pF 이상의 기생 커패시턴스가 존재하며, 높은 전압을 고속으로 스위칭 하게 될 경우 기생 커패시턴스를 통해 제어부로 공통 모드 전류가 흘러 오작동을 야기할 수 있다. 본 연구에서는 변압기를 대체하여 무선전력전송 코일을 이용한 게이트 드라이버용 절연된 전원공급 장치를 제안한다. 무선전력전송 코일 사이의 거리를 수 mm 이상 이격시켜 코일 사이의 기생 커패시턴스를 1 pF 이하로 줄이고 높은 절연 특성을 가질 수 있다. 무선전력 전송의 공진 토폴로지는 직렬-병렬을 선택했고, 2 MHz에서 높은 효율을 갖도록 I-core 코일을 2.2cm × 1.5cm × 1.7cm으로 제작해 검증했다.

• Journal of IKEEE
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• v.27 no.4
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• pp.386-390
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• 2023

In this study, we examined the quasi-nonvolatile memory characteristics of silicon nanosheet (SiNS) feedback field-effect transistors (FBFETs) fabricated using a complementary metal-oxide-semiconductor process. The SiNS channel layers fabricated by photoresist overexposure method had a width of approximately 180 nm and a height of 70 nm. The SiNS FBFETs operated in a positive feedback loop mechanism and exhibited an extremely low subthreshold swing of 1.1 mV/dec and a high ON/OFF current ratio of 2.4×10⁷. Moreover, SiNS FBFETs represented long retention time of 50 seconds, indicating the quasi-nonvolatile memory characteristics.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.37 no.1
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• pp.43-47
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• 2024

The size of semiconductor devices has been scaled down to improve packing density and output performance. However, there is uncontrollable spreading of the dopants that comprise the well, punch-stop, and channel-stop when using high-temperature annealing processes, such as rapid thermal annealing (RTA). In this context, low-temperature deuterium annealing (LTDA) performed at a low temperature of 300℃ is proposed to reduce the thermal budget during CMOS fabrication. The LTDA effectively eliminates the interface trap in the gate dielectric layer, thereby improving the electrical characteristics of devices, such as threshold voltage (V_TH), subthreshold swing (SS), on-state current (I_ON), and off-state current (I_OFF). Moreover, the LTDA is perfectly compatible with CMOS processes.