• Title/Summary/Keyword: 등가저항면적

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A numerical study on effects of drag coefficient of vehicle on jet fans in case of fire in road tunnels (도로터널 화재시 차량의 항력계수가 제연용 제연팬에 미치는 영향에 대한 해석적 연구)

  • Yoo, Yong-Ho;Yoo, Ji-Oh;Kim, Hyo Gyu
    • Journal of Korean Tunnelling and Underground Space Association
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    • v.16 no.6
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    • pp.553-560
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    • 2014
  • The road tunnel install a vent for the purpose of ventilation and smoke control. Ventilation equipment capacity(number of jet fans) depends on from the condition that of the pressure and ventilation resistance. Pressure and the resistance under operating vehicle have affected on the drag coefficient. The drag coefficient of the tunnel have affected by the blockage effect and slipstream effects. However, when calculating the ventilation fan, are not properly consider taking into account such effects. Therefore, ventilation force may have been slightly overestimated. This paper describes the drag coefficient through a numerical analysis to calculate the equivalent resistance area that reflects the vehicle distance, and examined the equivalent resistance area. The ventilation coefficient corresponding to the result heavy vehicle mixing ratio of the present study was not clear. Equivalent resistance area had reduced by about 86% compared to the road design handbook current standards. Also it had analyzed and reduced to 62.2% compared to Korea Highway Corporation ventilation design criteria ratio, which is the old standard.

The Estimation and Application of Optimum Design Variables for Road Tunnel Ventilation System Based on Statistical Analysis (통계적 분석을 이용한 터널 환기시스템 적정설계변수의 산정 및 적용에 관한 연구)

  • 이보영;유용호;김진
    • Tunnel and Underground Space
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    • v.14 no.5
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    • pp.373-380
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    • 2004
  • In this study, the emission rate of pollutant was modified according to the published standards, and the distribution of pollutant concentration was analyzed for each vehicle velocity. This modified emission rate was applied to a model tunnel and it was proved that the required air quantity was reduced to 49%, compared to the PIARC method. From the simulation result, it was proved by using statistics that the most sensitive factor among them is the friction coefficient and it was modified to the value in the range of 0.018 to 0.021. It is also expected that the required air quantity can be decreased form 14.4% to 19.2% according as the coefficient is applied to the domestic model tunnels. In conclusion, it is proposed that the number of jet fans can be reduced and the annual operating cost can be curtailed as well.

An Area Efficient Low Pass Filter for Inner Hair Cell using CMOS Process (CMOS공정을 이용한 Inner Hair Cell의 모델링에 적합한 면적 효율적인 저역 통과필터의 설계)

  • Ryu, Seung-Tak;Lee, Kwang;Choi, Bae-Kun;Cho, Gyu-Hyeong
    • Proceedings of the KIEE Conference
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    • 2001.07d
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    • pp.2567-2569
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    • 2001
  • 본 논문에서는 내이(Inner ear)의 한 부분을 차지하는 Inner Hair Cell을 구현함에 있어 필수적인 요소인 낮은 극점을 갖는 저역통과필터(LPF)를 최소의 면적으로 구현하기 위한 설계방법을 언급한다. 이를 위해 본 논문에서는 CMOS Compatible Lateral BJT (CLBT)를 사용하여 능동소자의 등가 저항을 증가시켜 커패시터의 값을 획기적으로 줄일 수 있는 기법의 LPF와 gm-C필터를 이용한 LPF를 전류모드로 설계하였다. 저전력 특성과 큰 임피던스 특성을 얻기 위해 모든 트랜지스터는 약반전 영역에서 동작하고 극점은 1kHz근처에 존재한다.

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Thermal and Stress Analysis of Power IGBT Module Package by Finite Element Method (유한요소법에 의한 대전력 IGBT 모듈의 열.응력해석)

  • 김남균;최영택;김상철;박종문;김은동
    • Journal of the Microelectronics and Packaging Society
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    • v.6 no.4
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    • pp.23-33
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    • 1999
  • A finite element method was employed fort thermal and stress analyses of an IGBT module of 3-phase full bridge. The effect of material parameters such as substrate material, substrate area, solder thickness on the temperature and stress distributions of the module packages has been investigated. Thermal analysis results have also been compared by setting of boundary conditions such as equivalent heat transfer coefficient or constant temperature at a base metal surface of the package. The increase of ceramic substrate area up to 3 times does little contribution to the reduction(8.9%) of thermal resistance, while contributed a lot to the reduction(60%) of thermal stress. Thicker solder resulted in higher thermal resistance but did slightly reduced thermal stresses. It is revealed by the stress analysis that maximum stress was induced at the region of copper pads which are bonded with ceramic substrate.

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Theoretical and experimental studies on influence of electrode variations in electrical resistivity survey for tunnel ahead prediction (터널 굴착면 전방조사를 위한 전기비저항 탐사에서 전극의 변화가 미치는 영향에 대한 이론 및 실험연구)

  • Hong, Chang-Ho;Chong, Song-Hun;Hong, Eun-Soo;Cho, Gye-Chun;Kwon, Tae-Hyuk
    • Journal of Korean Tunnelling and Underground Space Association
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    • v.21 no.2
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    • pp.267-278
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    • 2019
  • Variety of tunnel ahead prediction methods have been performed for safe tunnel construction during tunnel excavation. Pole-pole array among the electrical resistivity survey, which is one of the tunnel ahead prediction method, has been utilized to predict water-bearing sediments or weak zone located within 5 times of tunnel diameter. One of the most important processes is the estimation of virgin ground resistivity and it can be obtained from the following process: 1) calculation of contact area between the electrodes and the medium, and 2) assumption of the electrodes as equivalent spherical electrodes which have a same surface area with the electrodes. This assumption is valid in a small contact area and sufficient distance between the electrodes. Since the measured resistance, in general, varies with the electrode size, shape, and distance between the electrodes, it is necessary to evaluate the influence of these factors. In this study, theoretical equations were derived and experimental tests were conducted considering the electrode size, shape, and distance of cylindrical electrodes which is the most commonly utilized electrode shape. Through this theoretical and experimental study, it is known that one should be careful to use the assumption of the equivalent half-spherical electrode with large ratio between the penetrated depth and radius of the cylindrical electrode, as the error may get larger.

Frequency Characteristics of Anodic Oxide Films: Effects of Anodization Valtage

  • Lee, Dong-Nyung;Yoon, Young-Ku
    • Nuclear Engineering and Technology
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    • v.6 no.1
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    • pp.14-22
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    • 1974
  • Effects of anodization voltage on frequency characteristics of anodic oxide films on tantalum were analyzed based on the following impedance equatious : (equation omitted) Here $R_{f}$, $C_{f}$ and tan $\delta$$_{f}$ are equivalent series resistance in ohm, equivalent Belies capacitance in farad and dielectric loss, of anodic oxide films respectively Parameters P, $\tau$$_{ο}$, $\tau$$_{\omega}$, and Co are defined as follows: P=(d-w)/w, $\tau$$_{ο}$=$textsc{k}$$\rho$$_{ο}$, $\tau$$_{\omega}$=$textsc{k}$$\rho$$_{\omega}$, $C_{ο}$=$textsc{k}$A/d where d is the thickness of oxide film, $\omega$ is the diffusion layer thickness. $\rho$$_{ο}$ is the resistivity of oxide film at the interface of metal and the oxide, $\rho$$_{\omega}$ is the resistivity of oxide film at intrinsic region and A is the area of the film and $textsc{k}$=0.0885$\times$10$^{-12}$ $\times$dielectric constant, (in farad/cm). It was shown that dielectric loss and frequency dependence of equivalent series capacitance decrease as anodization voltage increases. This is a consequence of the fact that the thickness of diffusion layer increases a little with increasing anodization voltage whereas the total oxide thickness is proportional to the anodization voltage. The ngative deviation of measured values from tile relation, tan $\delta$$_{f}$=0.682 $\Delta$ $C_{f}$, was also discussed based on the Impedance equations given above. Here $\Delta$ $C_{f}$ is the change in capacitance between 0.1 and 1 KHZ.KHZ.Z.

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Design of a CCM/DCM dual mode DC-DC Buck Converter with Capacitor Multiplier (커패시터 멀티플라이어를 갖는 CCM/DCM 이중모드 DC-DC 벅 컨버터의 설계)

  • Choi, Jin-Woong;Song, Han-Jung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.17 no.9
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    • pp.21-26
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    • 2016
  • This paper presents a step-down DC-DC buck converter with a CCM/DCM dual-mode function for the internal power stage of portable electronic device. The proposed converter that is operated with a high frequency of 1 MHz consists of a power stage and a control block. The power stage has a power MOS transistor, inductor, capacitor, and feedback resistors for the control loop. The control part has a pulse width modulation (PWM) block, error amplifier, ramp generator, and oscillator. In this paper, an external capacitor for compensation has been replaced with a multiplier equivalent CMOS circuit for area reduction of integrated circuits. In addition, the circuit includes protection block, such as over voltage protection (OVP), under voltage lock out (UVLO), and thermal shutdown (TSD) block. The proposed circuit was designed and verified using a $0.18{\mu}m$ CMOS process parameter by Cadence Spectra circuit design program. The SPICE simulation results showed a peak efficiency of 94.8 %, a ripple voltage of 3.29 mV ripple, and a 1.8 V output voltage with supply voltages ranging from 2.7 to 3.3 V.

0.6 mAh All-Solid-State Thin Fim Battery Fabricated on Alumina Substrate (알루미나 기판상에 구현된 0.6mAh급 전고상 박막전지)

  • Park, H.Y.;Nam, S.C.;Lim, Y.C.;Choi, K.G.;Lee, K.C.;Park, G.B.;Cho, S.B.
    • Journal of the Korean Electrochemical Society
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    • v.8 no.4
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    • pp.181-185
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    • 2005
  • Lithium cobalt oxide thin film cathode, having thickness of $2.9{\mu}m$ with area of $4cm^2$, was deposited on platinum patterned alumina substrate by radio frequency magnetron sputtering. Li/Co molar ratio, which is an important factor for battery performance, was measured as a function of argon working pressure and applied R.F. power. Constant current charge and discharge performances were characterized with high rate discharge and cycling behavior. Using AC impedance analysis, internal resistance of the thin film battery was measured and simulated by proposed equivalent circuit model.

Indictor Library for RF Integrated Circuits in Standard Digital 0.18 μm CMOS Technology (RF 집적회로를 위한 0.18 μm CMOS 표준 디지털 공정 기반 인덕터 라이브러리)

  • Jung, Wee-Shin;Kim, Seung-Soo;Park, Yong-Guk;Won, Kwang-Ho;Shin, Hyun-Chol
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.18 no.5 s.120
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    • pp.530-538
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    • 2007
  • An inductor library for efficient low cost RFIC design has been developed based on a standard digital 0.18 ${\mu}m$ CMOS process. The developed library provides four structural variations that are most popular in RFIC design; standard spiral structure, patterned ground shield(PGS) structure to enhance quality factor, stacked structure to enable high inductance values in a given silicon area, multilayer structure to lower series resistance. Electromagnetic simulation, equivalent circuit, and parameter extraction processes have been verified based on measurement results. The extensive measurement and simulation results of the inductor library can be a great asset for low cost RFIC design and development.