• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.6
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• pp.1107-1114
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• 2004

System Packet Interface Level 4 Phase 2(SPI-4.2) is an interface for packet and cell transfer between a physical layer(PHY) device and a link layer device, for aggregate bandwidths of OC-192 ATM and Packet Over Sonet/SDH(POS), as well as 10Gbps Ethernet applications. SPI-4.2 core consists of Tx and Rx modules and supports full duplex communication. Tx module of SPI-4.2 core writes 64-bit data word and 14-bit header information from the user interface into asynchronous FIFO and transmits DDR(Double Data Rate) data over PL4 interface. Rx module of SPI-4.2 core operates in vice versa. Tx and Rx modules of SPI-4.2 core are designed to support maximum 256-channel and control the bandwidth allocation by configuring the calendar memory. Automatic DIP4 and DIP-2 parity generation and checking are implemented within the designed core. The designed core uses Xilinx ISE 5.li tool and is described in VHDL Language and is simulated by Model_SIM 5.6a. The designed core operates at 720Mbps data rate per line, which provides an aggregate bandwidth of 11.52Gbps. SPI-4.2 interface core is suited for line cards in gigabit/terabit routers, and optical cross-connect switches, and SONET/SDH-based transmission systems.

• Journal of Korean Society of Neurocognitive Rehabilitation
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• v.10 no.2
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• pp.27-34
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• 2018

The purpose of this study is to investigate the effect of task training for cognitive activation of upper extremity on upper limb function and activities of daily living and to suggest intervention in rehabilitation treatment. From January to February of 2018, nine stroke patients were arbitrated 30 minutes a day, five days a week, for four weeks. For the experimental group, the therapist has induced the group using the linguistic guidance to patients, so they utilize the cognition strategy. The control group conducted active exercises in a range of motion using the instruments and passive exercises in a range of motion to reduce the stiffness of joints and upper limbs. As muscle strengthening exercises, the patients were assigned to work on the biceps muscle of arm, triceps muscle of arm, and deltoid according to the individual patient's muscular strength level. For the experimental group, the MBI was improved by ten points at maximum, and K-AMPS motor skills showed the improvements of 1.0 logit at maximum, and processing skills showed improvements of 0.6 logits at maximum. In MFT, the maximum improvement was by two points. For the control group, MBI was improved by five points at maximum, and 0.2 maximum improvements were shown in K-AMPS' motor skills and 0.3 maximum improvements in processing skills. MFT showed no change. The conclusion is that the challenges to enable training for stroke patients give a positive impact on upper limb function and activities of daily living.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2022.10a
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• pp.360-363
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• 2022

According to the 2018 Kaggle ML & DS Survey, among the proportions of frameworks for machine learning and data science, TensorFlow and Keras each account for 41.82%. It was found to be 34.09%, and in the case of development programming, it is confirmed that about 82% use Python. A significant number of machine learning and deep learning structures utilize the Keras framework and Python, but in the case of Python, distribution and execution are limited to the Python script environment due to the script language, so it is judged that it is difficult to operate in various environments. This paper implemented a machine learning and deep learning system using C# and Keras running in Visual Studio 2019. Using the Mnist dataset, 100 tests were performed in Python 3.8,2 and C# .NET 5.0 environments, and the minimum time for Python was 1.86 seconds, the maximum time was 2.38 seconds, and the average time was 1.98 seconds. Time 1.78 seconds, maximum time 2.11 seconds, average time 1.85 seconds, total time 37.02 seconds. As a result of the experiment, the performance of C# improved by about 6% compared to Python, and it is expected that the utilization will be high because executable files can be extracted.

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2005.11a
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• pp.256-259
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• 2005

운세정보 서비스는 전화로 일반 사용자들이 많이 이용하고 있지만 사용자들이 이용하기에 너무 비싸고 서비스 제공자가 항상 대기해야한다는 단점이 있다. 이점을 보완하는 웹서비스가 있지만 언제 어디서나 이 서비스를 활용할 수는 없다. 그래서 VoiceXML을 이용한 운세정보서비스를 구현하였다. VoiceXML은 음성을 웹 페이지처럼 작성할 수 있는 언어이고 웹과도 호환성이 좋아 기존 웹 서비스의 기능을 모두 지원하면서 독립적으로 음성 인터페이스를 제공해 전화와 웹 서비스의 장점을 모두 취할 수 있다. 본 연구에서는 웹 서비스중 오늘의 운세, 궁합, 바이오리듬, 타로카드점을 VoiceXML을 이용하여 구현했다. 12인의 피 실험자가 각 메뉴를 모두 2번씩 실험한 결과 95%이상의 동작 성공률을 보였다. 그리고 실험자에 대한 설문조사 결과 기존 웹 서비스에 비해 범용성과 경제성 면에서 장점을 갖는다는 결과가 나왔다. 앞으로 입력부분에 대화형 서비스 메뉴를 보완하여 더욱 사용이 편리한 서비스로 개선할 계획이다.

• Journal of Advanced Navigation Technology
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• v.14 no.3
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• pp.321-327
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• 2010

This paper deals with the design and development of the motorized valve control system using CANopen protocol. The CAN network protocol is used in the physical layer(layer 1) and data link layer(layer 2), and other upper network layer above that layer 1 and 2 utilize the CANopen protocol in this paper. The motorized valve controller is implemented by a PIC microprocessor, and the server application software for the control system user is written in C# language. In particular the CANopen protocol is widely used int the area such as ship automation systems and marine transportation systems. The experimental result of the proposed control system implemented in this paper is evaluated via real-time experiments, which works well as designed.

• Journal of IKEEE
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• v.13 no.4
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• pp.57-62
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• 2009

In this paper, to implement PCS (Physical Coding Sublayer) of 10GBASE-R type, we present 2 stage pipeline 64b/66b Encoder/Decoder which operates at 156.25MHz standard specification and designed to minimize clock latency as possible as we can. The proposed circuit was designed based on Verilog hardware description language and measured for functional verification on VertexII-1000fg456 chip of Xilinx Inc.. Total equivalent gate count is 47,303 and estimated power consumption is 351mW at Vcc 3.3V.

• Journal of Korea Game Society
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• v.2 no.1
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• pp.42-48
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• 2002

Many web-based simulation environments have been proposed to create models and execute simulation through the Web. Although web-based simulation has the advantage of utilizing many computers connected to Internet, overhead of the web server and heavy traffic caused by Java RMI degrade the performance and scalability of simulation. In this paper, we design and implement web-based distributed simulator using Java for the scalability and performance. In addition, we can apply the proposed simulator to create model server and client engines in online game. We apply the proposed simulator to simulate ATM switch queueing model.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.4
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• pp.819-825
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• 2003

The purpose of this study is to develop the speaker recognition system which can select one of operating modes in FES for general paralysis patients. As spiral injury by traffic accident, industrial disaster, or stroke has been increased, the development of FES(Functional Electrical Stimulator) system is urgent to prevent paralysis and atrophy, and to assist the patients walking. For these patients we developed FES system(1). To operate this system one of several operating modes must be selected. As this can not be done by general paralysis patients, an attempt has been tried in this study to select the mode by speaker recognition system. RSC-300 of sensory co. has been chosen as a speaker recognition chip, and PIC16F84 is adapted to interface RSC-300 and FES system.

• The KIPS Transactions:PartD
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• v.10D no.4
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• pp.735-744
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• 2003

This paper presents details of the design and implementation of a report generator, Moonlight, which supports to design the report form from DB or data sources and print it to the printer. Also this paper defines the detailed model of the report system, the architecture and behavior of MoonLight, and the components of the report form, and also shows algorithms to make the report template and print the report bound to the data source. Moonlight takes advantage of XML language for the report template form. And also it is implemented by Jana language to take the advantage of platform independency. This paper also shows the results of run-time performance of Moonlight which is measured with the time to construct page objects of a report and the time to render the page objects to the print images, respectively.

• The KIPS Transactions:PartD
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• v.13D no.1 s.104
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• pp.117-124
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• 2006

Hardware and software codesign framework called PeaCE(Ptolemy extension as a Codesign Environment) was developed. It allows to express both data flow and control flow which is described as fFSM which extends traditional finite state machine. While the fFSM model provides lots of syntactic constructs for describing control flow, it has a lack of their formality and then difficulties in verifying the specification. In order to define the formal semantics of the fFSM, in this paper, firstly the hierarchical structure in the model is flattened and then the step semantics is defined. As a result, some important bugs such as race condition, ambiguous transition, and circulartransition can be formally detected in the model.