• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.7
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• pp.1296-1302
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• 2016

A hardware implementation of ultra-lightweight block cipher algorithm PRESENT that was specified as a block cipher standard for lightweight cryptography ISO/IEC 29192-2 is described in this paper. Two types of crypto-core that support master key size of 80-bit are designed, one is for encryption-only function, and the other is for encryption and decryption functions. The designed PR80 crypto-cores implement the basic cipher mode of operation ECB (electronic code book), and it can process consecutive blocks of plaintext/ciphertext without reloading master key. The PR80 crypto-cores were designed in soft IP with Verilog HDL, and they were verified using Virtex5 FPGA device. The synthesis results using $0.18{\mu}m$ CMOS cell library show that the encryption-only core has 2,990 GE and the encryption/decryption core has 3,687 GE, so they are very suitable for IoT security applications requiring small gate count. The estimated maximum clock frequency is 500 MHz for the encryption-only core and 444 MHz for the encryption/decryption core.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.11
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• pp.32-40
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• 2016

IEEE 802.15.4 is the one of the protocols for radio communication in a personal area network. Because of low cost and low power communication for IoT communication, it requires the highest optimization level in the implementation. Recently, the studies of location aware algorithm based on IEEE802.15.4 standard has been achieved. Location estimation is performed basically in equal consideration of reference node information and blind node information. However, an error is not calculated in this algorithm despite the fact that the coordinates of the estimated location of the blind node include an error. In this paper, we enhanced a conventual maximum likelihood estimation using weighted coefficient and implement the hardwired location aware engine for small code size and low power consumption. On the field test using test-beds, the suggested hardware based location awareness method results better accuracy by 10 percents and reduces both calculation and memory access by 30 percents, which improves the systems power consumption.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.40 no.9
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• pp.1776-1785
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• 2015

Content Centric Network (CCN) has been introduced as a new paradigm due to a shift of users's perspective of using Internet from host-centric to content-centric. On the other hand, a demand for video streaming has been increasing. Thus, Adaptive streaming has been introduced and researched for achieving higher user's satisfaction. If an architecture of Internet is replaced with CCN architecture, it is necessary to consider adaptive video streaming in CCN according to the demand of users. However, if the same rate decision algorithm used in Internet is deployed in CCN, there are a limitation of utilizing content store (CS) in CCN router and a problem of reflecting dynamic requirements. Therefore, this paper presents a framework adequate to CCN protocol and cache utilization, adapting content naming method of exploiting regular expression to the rate decision algorithm of the existing adaptive streaming. In addition, it also improves the quality of video streaming and verifies the performance through dynamic expression strategies and selection algorithm of the strategies.

• Journal of Broadcast Engineering
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• v.16 no.6
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• pp.986-995
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• 2011

In this paper, we propose a noise whitening decision feedback equalizer for single carrier frequency division multiple access (SC-FDMA) receivers. SC-FDMA has the same advantage as that of orthogonal frequency division multiple access (OFDMA) in which the multipath effect can be removed easily, and also solves the problem of high peak to average power ratio (PAPR) which is the main drawback of OFDMA. Although SC-FDMA is a single carrier transmission scheme, a simple frequency domain linear equalizer (FD-LE) can be implemented as in OFDMA, which can dramatically reduce the equalizer complexity. Moreover, some residual intersymbol interference in the output of the FD-LE can be further removed by an additional nonlinear decision feedback equalizer (DFE) in time domain, because the time domain signal is a digitally modulated symbol. In the conventional DFE, however, the noise is not white at the input of the decision device and correspondingly the decision is not optimum. In this paper, we propose an improved DFE scheme for SC-FDMA systems where a linear noise whitening filter is inserted before the decision device of the conventional DFE scheme. Through computer simulations, we compare the bit error rate performance of the proposed DFE scheme with the conventional equalizers.

• Journal of Astronomy and Space Sciences
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• v.24 no.4
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• pp.349-366
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• 2007

We designed and developed a multi-purpose CCD camera system for three kinds of CCDs; KAF-0401E($768{\times}512$), KAF-1602E($1536{\times}1024$), KAF-3200E($2184{\times}1472$) made by KODAK Co.. The system supports fast USB port as well as parallel port for data I/O and control signal. The packing is based on two stage circuit boards for size reduction and contains built-in filter wheel. Basic hardware components include clock pattern circuit, A/D conversion circuit, CCD data flow control circuit, and CCD temperature control unit. The CCD temperature can be controlled with accuracy of approximately $0.4^{\circ}C$ in the max. range of temperature, ${\Delta}33^{\circ}C$. This CCD camera system has with readout noise $6\;e^-$, and system gain $5\;e^-/ADU$. A total of 10 CCD camera systems were produced and our tests show that all of them show passable performance.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.12
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• pp.3587-3593
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• 2009

Nowadays, the PV systems have been focused on the interconnection between the power source and the grid. The PV inverter, either single-phase or three-phase, can be considered as the core of the whole system because of an important role in the grid-interconnecting operation. An important issue in the inverter control is the load current regulation. In the literature, the Proportional+Integral (PI) controller, normally used in the current-controlled Voltage Source Inverter (VSI), cannot be a satisfactory controller for an ac system because of the steady-sate error and the poor disturbance rejection, especially in high-frequency range. By comparison with the PI controller, the Proportional+Resonant (PR) controller can introduce an infinite gain at the fundamental ac frequency; hence can achieve the zero steady-state error without requiring the complex transformation and the dq-coupling technique. In this paper, a PR controller is designed and adopted for replacing the PI controller. Based on the theoretical analyses, the PR controller based control strategy is implemented in a 32-bit fixed-point TMS320F2812 DSP and evaluated in a 3kW experimental prototype Photovoltaic (PV) power conditioning system (PCS). Simulation and experimental results are shown to verify the performance of implemented control scheme in PV PCS.

• Journal of Korean Tunnelling and Underground Space Association
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• v.22 no.1
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• pp.91-105
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• 2020

This study is the basic study for improving the range of influence and potency of mixing bars in the chamber of Shield TBM. Currently, there are many studies on disk cutters, cutter bits and segments in the study of the domestic Shield TBM. However, studies that mix soil and rocks that come from the membrane during the Shield TBM excavation and scatter them with screw conveyors are not as good as those abroad. In this study, the existing Shield TBM Chamber was manufactured as a miniature and the experiment. Inside the chamber, different sizes (4 mm, 6 mm, 8 mm, 10 mm) and colors (black, white, red, and blue) were used to form layers. This experiment was carried out by different shapes and sizes of RPM and mixing bars. In addition, the difference between a miniature model and a reclining one was checked to determine the effect of the direction of gravity on the mixing efficiency. This was done in the same way for all other conditions other than differences in the direction of gravity. Through this experiment, we identified the orientation of the chamber model, the size and shape of the mixing bar inside, and the mixing effect and torque depending on RPM. A comparative review of the mixing effect and torque confirmed that the shape and size of the mixing bar affect the mixing of samples, and that the direction of gravity affects torque.

• Journal of Broadcast Engineering
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• v.11 no.4 s.33
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• pp.386-395
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• 2006

Multi-view video coding technology demands the very high efficient coding technologies, because it has to encode a number of video sequences which are achieved from a number of video cameras. For this purpose, multi-view video coding introduces the inter-view prediction scheme between different views, but it shows a limitation of coding performance enhancement by adopting only new prediction method. Accordingly, we are going to achieve the more coding performance by enhancing dequantizer perfermance. Multi-view video coding is implemented basically based on H.264/AVC and uses the same quantization/de-quantization method as H.264/AVC does. The conventional quantizer and dequantizer is designed with the assumption that input residual signal follows the Laplacian PDF. However, it doesn't follow the fixed PDF type always. This mismatch between assumption and real data causes degradation of coding performance. To solve this problem, we propose the efficient de-quantization method based on quantized coefficients distribution at decoder without extra information. The extensive simulation results show that the proposed algorithm produces maximum $1.5\;dB{\sim}0.6\;dB$ at high bitrate compared with that of conventional method.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.1
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• pp.7-16
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• 2015

The transmitter of quadrature multiplexed GMSK (QM-GMSK) is composed of two quadrature multiplexed GMSK modulators. QM-GMSK has a slightly increased spectrum main lobe compared with $Q^2PSK$ or QMSK, but it has highly suppressed side lobes. As a result, practical spectrum efficiency of QM-GMSK is achieved. By replacing the baseband elementary pulses of QM-GMSK with their approximate, the squared sinusoid of half-period, offset-$Q^2PSK$($OQ^2PSK$) is obtained. The $OQ^2PSK$ signal has similar spectral properties to QM-GMSK. The transmitter of $OQ^2PSK$ can be simply implemented without the Gaussian lowpass filter, which is required in QM-GMSK transmitter. In this paper, we propose an overlapped pulse shaping in $OQ^2PSK$ with RC(raised-cosine) or SRC(squared raised-cosine) pulses of length longer than the symbol period. Power spectrum of the proposed modulation scheme exhibits further suppressed side lobes, hence enhanced spectrum efficiency is obtained. Simulation results indicate that BER performance of the proposed scheme is comparable to that of $OQ^2PSK$.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.10
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• pp.39-50
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• 1998

Wide-band sharp-transition filters are widely used in applications such as wireless CODEC design or medical systems. Since these filters suffer from large sensitivity and roundoff noise, large word-length is required for the VLSI implementation, which increases the hardware size and the power consumption of the chip. In this paper, a low-power implementation technique for digital filters with wide-band sharp-transition characteristics is proposed using CPL (Complementary Pass-Transistor Logic), LWDF (Lattice Wave Digital Filter) and a modified DIFIR (Decomposed & Interpolated FIR) algorithm. To reduce the short-circuit current component in CPL circuits due to threshold voltage reduction through the pass transistor, three different approaches can be used: cross-coupled PMOS latch, PMOS body biasing and weak PMOS latch. Of the three, the cross-coupled PMOS latch approach is the most realistic solution when the noise margin as well as the energy-delay product is considered. To optimize CPL transistor size with insight, the empirical formulas for the delay and energy consumption in the basic structure of CPL circuits were derived from the simulation results. In addition, the filter coefficients are encoded using CSD (Canonic Signed Digit) format and optimized by a coefficient quantization program. The hardware cost is minimized further by a modified DIFIR algorithm. Simulation result shows that the proposed method can achieve about 38% reductions in power consumption compared with the conventional method.