• Title/Summary/Keyword: 공정지연

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Effect of Hydraulic Pressure on Organic Fouling in Pressure Retarded Osmosis (PRO) Process (압력지연삼투 (PRO) 공정에서 유도용액에서의 압력이 유기물 파울링에 미치는 영향)

  • Suh, Dongwoo;Yoon, Hongsik;Yoon, Jeyong
    • Journal of Korean Society of Water and Wastewater
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    • v.29 no.1
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    • pp.133-138
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    • 2015
  • Pressure retarded osmosis (PRO) process is one of membrane processes for harvesting renewable energy by using salinity difference between feed and draw solutions. Power is generated by permeation flux multiplied by hydraulic pressure in draw side. Membrane fouling phenomena in PRO process is presumed to be less sever, but it is inevitable. Membrane fouling in PRO process decreases water permeation through membrane, resulting in significant power production decline. This study intended to investigate the effect of hydraulic pressure in PRO process on alginate induced organic fouling as high and low hydraulic pressures (6.5 bar and 12 bar) were applied for 24 h under the same initial water flux. In addition, organic fouling in draw side from the presence of foulant (sodium alginate) in draw solution was examined. As major results, hydraulic pressure was found to be not a significant factor affecting in PRO organic fouling as long as the same initial water flux is maintained, inidicating that operating PRO process with high hydraulic pressure for efficient energy harvesting will not cause severe organic fouling. In addition, flux decline was negligible from the presence of organic foulant in draw side.

A 3-5GHz frequency band Programmable Impulse Radio UWB Transmitter (3-5 GHz 대역 중심 주파수 변환이 가능한 프로그래머블 임펄스 래디오 송신기)

  • Han, Hong-Gul;Kim, Tae-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.49 no.6
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    • pp.35-40
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    • 2012
  • This paper has proposed a 3~5 GHz IR-UWB low power transmitter for range detection application. Proposed transmitter which has been implemented in a $0.13{\mu}m$ CMOS technology is all digital circuit that consist of simple digital logic. this feature insure low complexity and low power consumption. In addition, center frequency can be changed by adopting voltage controlled delay cell for avoiding existing another radio frequency in UWB low band. Proposed circuit consume only 10pJ/b from 1.2 V supply voltage. The simulation results show 3.3~4.3 GHz center frequency controllability, -51 dBm/MHz maximum output power and is satisfied with FCC regulation.

An Improved Process System to File a Claim in Construction Projects (건설공사 시 클레임 제기를 위한 프로세스 시스템 개선 방안)

  • Bang, Taewon;Lee, Jaeseob
    • Korean Journal of Construction Engineering and Management
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    • v.18 no.3
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    • pp.22-32
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    • 2017
  • Judging from the past cases, the contractor has frequently suffered losses caused by disapproved requests or reduced payments since it has not known the conditions of the contract or it has filed a claim to the owner without any proper claim system. Therefore, the existing claim process needs to be reformed. In order to reform the claim process, the contractor should consolidate the organizational structure, grant accurate duty assignments to the claims manager, implement regular staff training on how to deal with claims. In addition to this reformation, the contractor needs to improve the management of construction period and process control, and manage related documents thoroughly. Regular meetings are also necessary in claims. This study attempts to prove the effectiveness of the reformed process applied to Project "A", where the owner was responsible for the delayed supply of materials, inaccurate oral instructions, insufficient information on the work, and frequent changes of design. The project was completed in 96 months, which was extended by 34 months from the initial construction period of 62 months. The reformed claim process is expected to be of great help not only to largescale construction works but also to smallscale ones.

Algorithm of GTS Time Slots Allocation Based on Weighted Fair Queuing in Environments of WBAN (WBAN 환경에서 Weighted Fair Queuing 기반의 GTS 타임 슬롯 할당 알고리즘)

  • Kim, Kyoung-Mok;Jung, Won-Soo
    • Journal of the Korea Society of Computer and Information
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    • v.16 no.11
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    • pp.45-56
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    • 2011
  • WBAN is short range wireless communication technology which is consists of several small devices close to, attached to or implanted into the human body. WBAN is classified into between medical and non-medical by applications based on technology and medical data with periodic characteristics is used the GTS method for transmitting data to guarantee the QoS. In this paper we proposed algorithm that resolve lack of GTSs while data transmit GTS method in superframe structure of WBAN. Coordinator dynamically allocates GTSs according to the data rate of devices and make devices share GTSs when lack of GTSs. We compared delay bounds, throughput for performance evaluation of the proposed algorithm. In other words, we proposed algorithm adaptive WFQ scheduling that GTS allocation support differential data rate in environments of WBAN. The experiment results show the throughput increased and the maximum delay decreased compared with Round Robin scheduling.

Study on Structure and Principle of Linear Block Error Correction Code (선형 블록 오류정정코드의 구조와 원리에 대한 연구)

  • Moon, Hyun-Chan;Kal, Hong-Ju;Lee, Won-Young
    • The Journal of the Korea institute of electronic communication sciences
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    • v.13 no.4
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    • pp.721-728
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    • 2018
  • This paper introduces various linear block error correction code and compares performances of the correction circuits. As the risk of errors due to power noise has increased, ECC(: Error Correction Code) has been introduced to prevent the bit error. There are two representatives of ECC structures which are SEC-DED(: Single Error Correction Double Error Detection) and SEC-DED-DAEC(: Double Adjacent Error Correction). According to simulation results, the SEC-DED circuit has advantages of small area and short delay time compared to SEC-DED-DAEC circuits. In case of SED-DED-DAEC, there is no big difference between Dutta's and Pedro's from performance point of view. Therefore, Pedro's code is more efficient than Dutta' code since the correction rate of Pedro's code is higher than that of Dutta's code.

A TCP-Friendly Congestion Control Scheme using Hybrid Approach for Enhancing Fairness of Real-Time Video (실시간 비디오 스트림의 공정성 개선를 위한 TCP 친화적 하이브리드 혼잡제어기법)

  • Kim, Hyun-Tae;Yang, Jong-Un;Ra, In-Ho
    • Journal of the Korean Institute of Intelligent Systems
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    • v.14 no.3
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    • pp.285-289
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    • 2004
  • Recently, due to the high development of the internet, needs for multimedia streams such as digital audio and video is increasing much more. In case of transmitting multimedia streams using the User Datagram Protocol (UDP), it may cause starvation of TCP traffic on the same transmission path, thus resulting in congestion collapse and enormous delay because UDP does not perform TCP-like congestion control. Because of this problem, diverse researches are being conducted on new transmission schemes and protocols intended to efficiently reduce the transmission delay of real-time multimedia streams and perform congestion control. The TCP-friendly congestion control schemes can be classified into the window-based congestion control, which uses the general congestion window management function, and the rate-based congestion control, which dynamically adjusts transmission rate by using TCP modeling equations and the like. In this paper, we suggest the square-root congestion avoidance algorithm with the hybrid TCP-friendly congestion control scheme which the window-based and rate-based congestion controls are dealt with in a combined way. We apply the proposed algorithm to the existing TEAR. We simulate the performance of the proposed TEAR by using NS, and the result shows that it gives better improvement in the stability needed for providing congestion control than the existing TEAR.

PID Controller Tuning for Integrating Processes with Time Delay (시간지연을 갖는 적분시스템용 PID 제어기의 동조)

  • Lee Yun-Hyung;Ahn Jong-Kap;Kim Min-Jung;So Myung-Ok;Jin Gang-Gyoo
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • 2006.06b
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    • pp.325-330
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    • 2006
  • Integrating processes are frequently encountered in process industries. Generally they are most commonly associated with level control problems. In this paper, tuning formulae of PID controllers for set-point tracking and load disturbance rejection are presented on integrating processes with time delay. In particular, the controller parameters are determined such that performance criteria(IAE, ISE and ITSE) are minimized. Optimal PID parameter sets are obtained by means of a real-coded genetic algorithm(RCGA) and then tuning rules are addressed using obtained PID parameter sets and another RCGA. The performances of the proposed tuning rules are tested on two processes.

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Autoignition Characteristics of Limonene - Expanded Polystyrene Mixture (Limonene - Expanded Polystyrene 혼합물의 자연발화 특성)

  • 송영호;하동명;정국삼
    • Fire Science and Engineering
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    • v.18 no.1
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    • pp.1-6
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    • 2004
  • In the reutilization process using limonene, the organic solvent to reduce volume of EPS, the AIT was measured with the variation of concentration and volume of mixture, in order to present the fund-mental data on the fire hazard assessment of limonene - EPS mixture at storage and handling. And ignition zone was compared with non-ignition zone. The equation related to AIT, activation energy and ignition delay time, used by the most scientific basis for predicting AIT values, was suggested using linear regression analysis as ln t = 0.704/T-5.819. And the equation related to concentration of mixture and AIT was also suggested to predict ignition hazard of combustible mixture using nonlinear regression analysis as $T_m/=248.32+69.27X+172.60X^2$. It enabled to predict ignition temperature according to variation of ignition delay time and concentration of mixture by the suggested equations.

Performance Analysis of Flow Control Method Using Virtual Switchs on ATM (ATM에서 가상 스위치를 이용한 흐름 제어 방식의 성능 분석)

  • 조미령;양성현;이상훈
    • Journal of the Korea Computer Industry Society
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    • v.3 no.1
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    • pp.85-94
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    • 2002
  • EMRCA(Explicit Max_min Rate Control Algorithm) switch, which has been proposed in the ATM(Asychronous Transfer Mode) standard, controls the ABR(Available Bit Rate) service traffic in the ATM networks. The ABR service class of ATM networks uses a feedback control mechanism to adapt to varying link capacities. The VS/VD(Virtual Source/Virtual Destination) technique offers the possibility to segment the otherwise end-to-end ABR control loop into separate loops. The improved feedback delay and the control of ABR traffic inside closed segments provide a better performance and QoS(Quality of Service) for ABR connections with respect to throughput, delay, and jitter. This paper is study of an ABR VS/VD flow control method. Linear control theory offers the means to derive correct choices of parameters and to assess performance issues, like stability of the system, during the design phase. The performance goals are a high link utilization, fair bandwidth distribution and robust operation in various environments, which are verified by discrete event simulations. The major contribution of this work is the use of linear control theory to model and design an ABR flow control method tailored for the special layout of a VS/VD switch, the simulation shows that this techniques better than conventional method.

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Scheduling Generation Model on Parallel Machines with Due Date and Setup Cost Based on Deep Learning (납기와 작업준비비용을 고려한 병렬기계에서 딥러닝 기반의 일정계획 생성 모델)

  • Yoo, Woosik;Seo, Juhyeok;Lee, Donghoon;Kim, Dahee;Kim, Kwanho
    • The Journal of Society for e-Business Studies
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    • v.24 no.3
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    • pp.99-110
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    • 2019
  • As the 4th industrial revolution progressing, manufacturers are trying to apply intelligent information technologies such as IoT(internet of things) and machine learning. In the semiconductor/LCD/tire manufacturing process, schedule plan that minimizes setup change and due date violation is very important in order to ensure efficient production. Therefore, in this paper, we suggest the deep learning based scheduling generation model minimizes setup change and due date violation in parallel machines. The proposed model learns patterns of minimizing setup change and due date violation depending on considered order using the amount of historical data. Therefore, the experiment results using three dataset depending on levels of the order list, the proposed model outperforms compared to priority rules.