• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.505-508
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• 2006

Self-heating induced device degradation and its width/length (W/L) dimension dependence were studied in p-type polycrystalline silicon (poly-Si) thin film transistors (TFTs). Negative channel conductance was observed under high power region of output curve, which was mainly caused by hole trapping into gate oxide and also by trap state generation by self-heating effect. Self-heating effect became aggravated as W/L ratio was increased, which was understood by the differences in heat dissipation capability. By reducing applied power density normalized to TFT area, self-heating induced degradation could be reduced.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.10
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• pp.754-759
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• 2013

Aluminum oxide($Al_2O_3$) film deposited by atomic layer deposition (ALD) is known to supply excellent surface passivation properties on crystalline Si surfaces. Since $Al_2O_3$ has fixed negative charge, it forms effective surface passivation by field effect passivation on the rear side in p-type silicon solar cell. However, $Al_2O_3$ layer formed by ALD process needs very long process time, which is not applicable in mass production of silicon solar cells. In this paper, plasma-assisted ALD(PA-ALD) was applied to form $Al_2O_3$ to reduce the process time. $Al_2O_3$ synthesized by ALD on c-Si (100) wafers contains a very thin interfacial $SiO_2$ layer, which was confirmed by FTIR and TEM. To improve passivation quality of $Al_2O_3$ layer, the deposition temperature was changed in range of $150{\sim}350^{\circ}C$, then the annealing temperature and time were varied. As a result, the silicon wafer with aluminum oxide film formed in $250^{\circ}C$, $400^{\circ}C$ and 10 min for the deposition temperature, the annealing temperature and time, respectively, showed the best lifetime of 1.6ms. We also observed blistering with nanometer size during firing of $Al_2O_3$ deposited on p-type silicon.

• Proceedings of the KIEE Conference
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• 2005.07c
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• pp.2410-2412
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• 2005

In this study, two types of PS substrate were fabricated for sensing of chemical and biological substances. For sensing of the humidity and chemical analyzes such as $CH_3OH$ or $C_2H_5OH$, PS layers are prepared by photoelectrochemical etching of silicon wafer in aqueous hydrofluoric acid solution. To evaluate their sensitivity, we measured the resistance variation of the PS diaphragm. As the amplitude of applied voltage increases from 2 to 6Vpp at constant frequency of 5kHz, the resistance variation for humidity sensor rises from 376.3 to $784.8{\Omega}$/%RH. And the sensitivities for $CH_3OH$ and $C_2H_5OH$ were 0.068 uA/% and 0.212 uA/%, respectively. For biological sensing application, amperometric urea sensors were fabricated based on porous silicon(PS), and planar silicon(PLS) electrode substrates by the electrochemical methods. Pt thin film was sputtered on these substrates which were previously formed by electrochemical anodization. Poly (3-methylthiophene) (P3MT) were used for electron transfer matrix between urease(Urs) and the electrode phase, and Urs also was by electrochemically immobilized. Effective working area of these electrodes was determined for the first time by using $Fe(CN)_6^{3-}/Fe(CN)_6^{4-}$ redox couple in which nearly reversible cyclic voltammograms were obtained. The $i_p$ vs $v^{1/2}$ plots show that effective working electrode area of the PS-based Pt thin film electrode was 1.6 times larger than the PLS-based one and we can readily expect the enlarged surface area of PS electrode would result in increased sensitivity by ca. 1.6 times. Actually, amperometric sensitivity of the Urs/P3MT/Pt/PS electrode was ca 0.91uA/$mM{\cdot}cm^2$, and that of the Urs/P3MT/Pt/PLS electrode was ca. 0.91uA/$mM{\cdot}cm^2$ in a linear range of 1mmol/L to 100mmol/L urea concentrations

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.4
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• pp.33-39
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• 1997

The crystallization temperature of an amorphous silicon (a-Si) can be lowered down to 400.deg. C by a new method : Double-metal induced lateral crystallization (DMILC). The a-Si film was laterally crystallized from Ni and Pd deposited area, and its lateral crystallization rate reaches up to 0.2.mu.m/hour at that temperature and depends on the overlap length of Ni and Pd films; the shorter the overlap length, the faster the rate. Poly-Silicon thin film transistors (poly-Si TFT's) fabricated by DMILC at 400.deg. C show a field effect mobility of 38.5cm$^{3}$/Vs, a minimum leakage current of 1pA/.mu.m, and a slope of 1.4V/dec. The overlap length does not affect the characteristics of the poly-Si TFT's, but determines the lateral crystallization rate.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.204-205
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• 2011

In thin film silicon solar cells, p-i-n structure is adopted instead of p/n junction structure as in wafer-based Si solar cells. PECVD is a most widely used thin film deposition process for a-Si:H or ${\mu}c$-Si:H solar cells. For best performance of thin film silicon solar cell, the dopant profiles at p/i and i/n interfaces need to be as sharp as possible. The sharpness of dopant profiles can easily achieved when using multi-chamber PECVD equipment, in which each layer is deposited in separate chamber. However, in a single-chamber PECVD system, doped and intrinsic layers are deposited in one plasma chamber, which inevitably impedes sharp dopant profiles at the interfaces due to the contamination from previous deposition process. The cross-contamination between layers is a serious drawback of a single-chamber PECVD system in spite of the advantage of lower initial investment cost for the equipment. In order to resolve the cross-contamination problem in single-chamber PECVD systems, flushing method of the chamber with NH3 gas or water vapor after doped layer deposition process has been used. In this study, a new plasma process to solve the cross-contamination problem in a single-chamber PECVD system was suggested. A single-chamber VHF-PECVD system was used for superstrate type p-i-n a-Si:H solar cell manufacturing on Asahi-type U FTO glass. A 80 MHz and 20 watts of pulsed RF power was applied to the parallel plate RF cathode at the frequency of 10 kHz and 80% duty ratio. A mixture gas of Ar, H2 and SiH4 was used for i-layer deposition and the deposition pressure was 0.4 Torr. For p and n layer deposition, B2H6 and PH3 was used as doping gas, respectively. The deposition temperature was $250^{\circ}C$ and the total p-i-n layer thickness was about $3500{\AA}$. In order to remove the deposited B inside of the vacuum chamber during p-layer deposition, a high pulsed RF power of about 80 W was applied right after p-layer deposition without SiH4 gas, which is followed by i-layer and n-layer deposition. Finally, Ag was deposited as top electrode. The best initial solar cell efficiency of 9.5 % for test cell area of 0.2 $cm^2$ could be achieved by applying the in-situ plasma cleaning method. The dependence on RF power and treatment time was investigated along with the SIMS analysis of the p-i interface for boron profiles.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.04a
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• pp.65-66
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• 2008

The realization and origin of p-type ZnO are main issue for photoelectronic devices based on ZnO material. N-doped and nominally undoped p-type ZnO films were achieved on silicon (100) and homo-buffer layers by RF magnetron sputtering and post in-situ annealing. The undoped film shows high hole mobility of 1201 $cm^2V^{-1}s^{-1}$ and low resistivity of $0.0454\Omega{\cdot}cm$ with hole concentration of $1.145\times10^{17}cm^{-3}$. The photoluminescence(PL) spectra show the emissions related to FE, DAP and defects of $V_{Zn}$, $V_O$, $Zn_O$, $O_i$ and $O_{Zn}$.

• Journal of Surface Science and Engineering
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• v.33 no.2
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• pp.77-86
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• 2000

In this study effects of La starting compounds and substrates on the densification of (P $b_{0.92}$L $a_{0.05}$)Ti $O_3$ thin films were investigated. After the heat treatment on platinized silicon at $650^{\circ}C$ for 30min thickness of PLT(i) thin films (from La-isopropoxide) shrank by 27%, while 33% reduction occurred for PLT (a) thin films (from La-acetate). These PLT(i) films showed less densified surface microstructure compared to the PLT (a) . Lower shrinkage of the films on platinized silicon than on bare silicon (41% and 40% for PLT (i) and PLT (a) respectively) is attributed to the earlier development of crystallinity in the film, which arrests film densification. In order to maximize sintering before crystallization, heat treatment at $400^{\circ}C$ for 3 hours followed by $650^{\circ}C$ for 30 min was attempted. This method increased the shrinkage of the PLT (i) and PLT (a) films two times and 1.5 times as much as that observed for the films heat treated at $650^{\circ}C$ for 30min, respectively. FTIR results indicated that first pyrolysis in the film is associated with the burning of acetate ligands. Condensation reaction between OHs was found to occur preferentially between $350^{\circ}C$ and $450^{\circ}C$, whereas majority of polycondensation between ROH-OH appears to occur until $300^{\circ}C$ and be completed below $450^{\circ}C$.EX>.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.173-176
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• 2004

Silicon thin films on p-type(100) silicon substrate have been prepared by a pulsed laser deposition(PLD) technique using a Nd:YAG laser. The pressure of the environmental gas during deposition was 1 Torr. After deposition, silicon thin film has been annealed in nitrogen ambient. Strong blue photoluminescence(PL) has been observed at room temperature. We report the optical properties of silicon thin films with the variation of the deposition parameters.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.37 no.4
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• pp.439-444
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• 2024

This study investigates the post-thermal treatment effects on the efficiency of silicon heterojunction solar cells, specifically examining the influence of annealing on p-type microcrystalline silicon oxide and ITO thin films. By assessing changes in carrier concentration, mobility, resistivity, transmittance, and optical bandgap, we identified conditions that optimize these properties. Results reveal that appropriate annealing significantly enhances the fill factor and current density, leading to a notable improvement in overall solar cell efficiency. This research advances our understanding of thermal processing in silicon-based photovoltaics and provides valuable insights into the optimization of production techniques to maximize the performance of solar cells.

• Journal of the Semiconductor & Display Technology
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• v.19 no.2
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• pp.72-76
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• 2020

The author demonstrated organic ferroelectric thin-film transistors with ferroelectric materials of P(VDF-TrFE) and an amorphous oxide semiconducting In-Ga-Zn-O channel on the silicon substrates. The organic ferroelectric layers were deposited on an oxide semiconductor layer by Langmuir-Blodgett method and then annealed at 128℃ for 30min. The carrier mobility and current on/off ratio of the memory transistors showed 9 ㎠V^-1s^-1 and 6 orders of magnitude, respectively. We can conclude from the obtained results that proposed memory transistors were quite suitable to realize flexible and werable electronic applications.