• Bulletin of the Korean Chemical Society
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• 제34권9호
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• pp.2563-2564
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• 2013

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 하계학술대회 논문집
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• pp.71-74
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• 2000

Pt/Pb$TiO_3$/$SrTiO_3$/p-Si films were prepared by metallo-organic solution deposition(M0SD) method and investigated its structure and ferroelectric properties. Crystallinity of specimen as a funtions of post annealing temperature and the thickness of $SrTiO_3$(STO) buffer layer was studied using XRD and AFM. Based on C-V and P-E curve, $PbTiO_3$(PTO) capacitors showed good ferroelectric hysteresis arising from the polarization switching properties. When the thickness of ST0 buffer layer between PTO and Si substrate was 260 nrn and the post annealing temperature was $650^{\circ}C$, it was showed that production of the pyrochlore phase due to interdiffusion of Si into FTO was prevented. The dielectric constant of FTO thin films calculated from a maximum Cma in the accumulation region was 180 and the dielectric loss was 0.30 at 100 kHz frequency. The memory window in the C-V curve is 1.6V at a gate voltage of 5V.

• 한국정보통신학회논문지
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• 제9권3호
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• pp.576-581
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• 2005

강유전체$(SrTiO_3)$ 박막을 게이트 절연층으로 하여 수소화 된 비정질 실리콘 박막 트랜지스터를 유리 기판 위에 제조하였다. 강유전체는 기존의 $SiO_2,\;SiN$ 등과 같은 게이트 절연체에 비하여 유전특성이 매우 뛰어나 TFT의 ON 전류를 증가시키고 문턱전압을 낮추며 항복특성을 개선하여 준다. PECVD에 의하여 증착된 a-Si:H는 FTIR 측정 결과 $2,000cm^{-1}$과 $876cm^{-1}$에서 흡수 밴드가 나타났으며, $2,000cm^{-1}$과 $635cm^{-1}$은 $SiH_1$의 stretching과 rocking 모드에 기인한 것이며 $876cm^{-1}$의 weak 밴드는 $SiH_2$ vibration 모드에 의한 것이다. a-SiN:H는 optical bandgap이 2.61 eV이고 굴절률은 $1.8\~2.0$, 저항률은 $10^{11}\~10^{15}\Omega-cm$ 정도로 실험 조건에 따라 약간 다르게 나타난다. 강유전체$(SrTiO_3)$ 박막의 유전상수는 $60\~100$ 정도이고 항복전계는 IMV/cm 이상으로 우수한 절연특성을 갖고 있다. 강유전체를 이용한 TFT의 채널 길이는 $8~20{\mu}m$, 채널 넓이는 $80~200{\mu}m$로서 드레인 전류가 게이트 전압 20V에서 $3.4{\mu}A$이고 $I_{on}/I_{off}$ 비는 $10^5\~10^8,\;V_{th}$는 $4\~5\;volts$이다.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2003년도 추계종합학술대회
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• pp.537-541
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• 2003

강유전체(SrTiO$_3$) 박막을 게이트 절연층으로 하여 수소화 된 비정질 실리콘 박막 트랜지스터를 유리 기판위에 제조하였다. 강유전체는 기존의 SiO$_2$, SiN 등과 같은 게이트 절연체에 비하여 유전특성이 매우 뛰어나 TFT의 ON 전류를 증가시키고 문턱전압을 낮추며 항복특성을 개선하여 준다. PECVD 에 의하여 증착된 a-Si:H 는 FTIR 측정 결과 2,000 $cm^{-}$1 과 635 $cm^{-}$l 및 876 cm-1 에서 흡수 밴드가 나타났으며, 2,000 $cm^{-1}$ / 과 635 $cm^{-1}$ / 은 SiH$_1$ 의 stretching 과 rocking 모드에 기인 한 것이며 876 $cm^{-1}$ / 의 weak 밴드는 SiH$_2$ vibration 모드에 의한 것이다. a-SiN:H 는 optical bandgap 이 2.61 eV 이고 굴절률은 1.8 - 2.0, 저항률은 $10^{11}$ - $10^{15}$ $\Omega$-cm 정도로 실험 조건에 따라 약간 다르게 나타난다. 강유전체(SrTiO$_3$) 박막의 유전상수는 60 - 100 정도이고 항복전계는 1MV/cm 이상으로 우수한 절연특성을 갖고 있다. 강유전체를 이용한 TFT 의 채널 길이는 8 - 20 $\mu$m, 채널 넓이는 80 - 200 $\mu$m 로서 드레인 전류가 게이트 전압 20V에서 3 $\mu$A 이고 Ion/Ioff 비는 $10^{5}$ - $10^{6}$, Vth 는 4 - 5 volts 이다.

• Journal of information and communication convergence engineering
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• 제2권2호
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• pp.93-96
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• 2004

The a-Si:H TFT using ferroelectric of $SrTiO_3$ as a gate insulator is fabricated on glass. Dielectric characteristics of ferroelectric are superior to $SiO_2$ and $Si_{3}N_{4}$. Ferroelectric increases on-current, decreases threshold voltage of TFT and also improves breakdown characteristics. The a-SiN:H has optical band gap of 2.61 eV, retractive index of 1.8∼2.0 and resistivity of $10^{13}$~$10^{15}$ $\Omega$cm, respectively. Insulating characteristics of ferroelectrics are excellent because dielectric constant of ferroelectric is about 60∼100 and breakdown strength is over 1MV/cm. TFT using ferroelectric has channel length of 8∼20 $\mu\textrm{m}$ and channel width of 80∼200 $\mu\textrm{m}$. And it shows that drain current is 3.4$\mu\textrm{A}$ at 20 gate voltage, $I_{on}$/$I_{off}$ is a ratio of $10^5$~$10^8$ and $V_{th}$ is 4∼5 volts, respectively. In the case of TFT without ferroelectric, it indicates that the drain current is 1.5 $\mu\textrm{A}$ at 20 gate voltage and $V_{th}$ is 5∼6 volts. With the improvement of the ferroelectric thin film properties, the performance of TFT using this ferroelectric has advanced as a gate insulator fabrication technology is realized.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 춘계학술회의 초록집
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• pp.21-21
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• 2010

(Ba,Sr)$TiO_3$ (BST) thin film with a perovskite structure has potential for the practical application in various functional devices such as nonvolatile-memory components, capacitor, gate insulator of thin-film transistors, and electro-optic devices for display. Normally, the BST thin films derived from sol-gel and sputtering are amorphous or partially crystalline when processed below $600^{\circ}C$. For the purpose of integrating BST thin film directly into a Si-based read-out integrated circuit (ROIC), it is necessary to process the BST film below $400^{\circ}C$. The microstructural and electrical properties of low-temperature crystallized BST film were studied. The BST thin films have been fabricated at $350^{\circ}C$ by UV-assisted rapidly thermal annealing (RTA). The BST films are in a single perovskite phase and have well-defined electrical properties such as high dielectric constant, low dielectric loss, low leakage current density, and high breakdown voltage. Photoexcitation of the organics contained in the sol-gel-derived films by high-intensity UV irradiation facilitates elimination of the organics and formation of the single-crystalline phase films at low temperatures. The amorphous BST thin film was transformed to a highly (h00)-oriented perovskite structure by high oxygen pressure processing (HOPP) at as low as $350^{\circ}C$. The dielectric properties of BST film were comparable to (or even better than) those of the conventionally processed BST films prepared by sputtering or post-annealing at temperature above $600^{\circ}C$. When external pressure was applied to the well-known contractive BST system during annealing, the nucleation energy barrier was reduced; correspondingly, the crystallization temperature decreased. The UV-assisted RTA and HOPP, as compatible with existing MOS technology, let the BST films be integrated into radio-frequency circuit and mixed-signal integrated circuit below the critical temperature of $400^{\circ}C$.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2004년도 SMICS 2004 International Symposium on Maritime and Communication Sciences
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• pp.53-56
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• 2004

The a-Si:H TFT using ferroelectric of SrTi $O_3$as a gate insulator is fabricated on glass. Dielectric characteristics of ferroelectric are superior to $SiO_2$and S $i_3$ $N_4$. Ferroelctric increases on-current, decreases thresh old voltage of TFT and also improves breakdown characteristics. The a-SiN:H has optical band gap of 2.61 eV, refractive index of 1.8~2.0 and resistivity of 10$^{13}$ - 10$^{15}$ $\Omega$cm, respectively. Insulating characteristics of ferroelectrics are excellent because dielectric constant of ferroelectric is about 60~100 and breakdown strength is over 1MV/cm. TFT using ferroelectric has channel length of 8~20${\mu}{\textrm}{m}$ and channel width of 80~200${\mu}{\textrm}{m}$. And it shows that drain current is 3.4$mutextrm{A}$ at 20 gate voltage, $I_{on}$ / $I_{off}$ is a ratio of 10$^{5}$ - 10$^{8}$ and $V_{th}$ is 4~5 volts, respectively. In the case of TFT without ferroelectric, it indicates that the drain current is 1.5 $mutextrm{A}$ at 20 gate voltage and $V_{th}$ is 5~6 volts. With the improvement of the ferroelectric thin film properties, the performance of TFT using this ferroelectric has advanced as a gate insulator fabrication technology is realized.zed.d.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.477-477
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• 2008

For more than three decades, the gate dielectrics in CMOS devices are $SiO_2$ because of its blocking properties of current in insulated gate FET channels. As the dimensions of feature size have been scaled down (width and the thickness is reduced down to 50 urn and 2 urn or less), gate leakage current is increased and reliability of $SiO_2$ is reduced. Many metal oxides such as $TiO_2$, $Ta_2O_4$, $SrTiO_3$, $Al_2O_3$, $HfO_2$ and $ZrO_2$ have been challenged for memory devices. These materials posses relatively high dielectric constant, but $HfO_2$ and $Al_2O_3$ did not provide sufficient advantages over $SiO_2$ or $Si_3N_4$ because of reaction with Si substrate. Recently, $HfO_2$ have been attracted attention because Hf forms the most stable oxide with the highest heat of formation. In addition, Hf can reduce the native oxide layer by creating $HfO_2$. However, new gate oxide candidates must satisfy a standard CMOS process. In order to fabricate high density memories with small feature size, the plasma etch process should be developed by well understanding and optimizing plasma behaviors. Therefore, it is necessary that the etch behavior of $HfO_2$ and plasma parameters are systematically investigated as functions of process parameters including gas mixing ratio, rf power, pressure and temperature to determine the mechanism of plasma induced damage. However, there is few studies on the the etch mechanism and the surface reactions in $BCl_3$ based plasma to etch $HfO_2$ thin films. In this work, the samples of $HfO_2$ were prepared on Si wafer with using atomic layer deposition. In our previous work, the maximum etch rate of $BCl_3$/Ar were obtained 20% $BCl_3$/ 80% Ar. Over 20% $BCl_3$ addition, the etch rate of $HfO_2$ decreased. The etching rate of $HfO_2$ and selectivity of $HfO_2$ to Si were investigated with using in inductively coupled plasma etching system (ICP) and $BCl_3/Cl_2$/Ar plasma. The change of volume densities of radical and atoms were monitored with using optical emission spectroscopy analysis (OES). The variations of components of etched surfaces for $HfO_2$ was investigated with using x-ray photo electron spectroscopy (XPS). In order to investigate the accumulation of etch by products during etch process, the exposed surface of $HfO_2$ in $BCl_3/Cl_2$/Ar plasma was compared with surface of as-doped $HfO_2$ and all the surfaces of samples were examined with field emission scanning electron microscopy and atomic force microscope (AFM).