• Title/Summary/Keyword: $SiO_2/Si$ interface

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Fabrication of FerroelectricLiNbO$_3$ Thin Film/Si Structures aud Their properties (강유전체 LiNbO$_3$ 박막/Si 구조의 제작 및 특성)

  • 이상우;김채규;김광호
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1997.11a
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    • pp.21-24
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    • 1997
  • Ferroeletric LiNbO$_3$ thin films hale been prepared directly on Si(100) substrates by conventional RF magnetron spurttering system for nonvolatile memory applications. As-deposited films were performed RTA(Rapid Thermal Annealing) treatment in an oxygen atmosphere at 600 $^{\circ}C$ for 60 s. The rapid thermal annealed films were changed to poly-crystalline ferroelectric nature from amorphous of as-deposition. The resistivity of the ferroelectric LiNbO$_3$ film was increased from a typical vague of 1~2$\times$10$^{8}$ $\Omega$.cm before the annealing to about 1$\times$10$^{13}$ $\Omega$.cm at 500 kV/cm and reduce the interface state density of the LiNbO$_3$/Si(100) interface to about 1$\times$10$^{11}$ cm$^2$ . eV. Ferroelectric hysteresis measurements using a Sawyer-Tower circuit yielded remanent polarization (Pr) and coercive field (Ec) values of about 1.2 $\mu$C/cm$^2$ and 120 kV/cm, respectively.

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Electricial properties of oxynitride films prepared by furnace oxidation in $N_2O$ ($N_2O$ 가스에서 형성된 oxynitride막의 전기적 특성)

  • Bae, Sung-Sig;Seo, Yong-Jin;Kim, Tae-Hyung;Kim, Chang-Il;Chang, Eui-Goo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1992.11a
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    • pp.90-93
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    • 1992
  • In this paper, MOS characteristics of gate dielectrics prepared by furnace oxidation of Si in an $N_2O$ ambient have been studied. Compared with the oxides grown in $O_2$, $N_2O$ oxides show significantly improved breakdown field and low flat band voltage. Also, $N_2O$ oxide is more controllable for ultrathin film growth than $O_2$ oxide. This improvement is caused by nitrogen incorporation into the $N_2O$ oxide. Therefore, the nitrogen-rich-layer at the Si/$SiO_2$ interface formed during $N_2O$ oxidation not only strengthen $N_2O$ oxide structure at the interface and improves the gate dielectric quality, it also acts as a oxidant diffusion barrier that reduces the oxidation rate significantly.

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A study of the crystallinity and microstructure of the $Si_{1-X}Ge_X$ alloys deposited on the $SiO_2$at various temperatures ($SiO_2$위에 증착된 $Si_{1-X}Ge_X$합금의 증착온도 변화에 따른 결정성 및 미세구조에 관한 연구)

  • Kim, Hong-Seung;Lee, Jeong-Yong;Lee, Seung-Chang;Gang, Sang-Won
    • Korean Journal of Materials Research
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    • v.4 no.4
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    • pp.416-427
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    • 1994
  • The changes of crystallinity and microstructure and the $Si_{1-x}Ge_x/Sio_2$ interfaces of $Si_{1-x}Ge_x$ alloys deposited on amorphous $SiO_{2}$ were studied as a function of deposition temperature. The crystallinity, microstructure, and compositional uniformity of $Si_{1-x}Ge_x$ alloys deposited on the SiOl at different temperature were investigated by X-ray diffraction and transmission electron microscopy. And $Si_{1-x}Ge_x/Sio_2$ interface were investigated by high-resolution transmission electron microscopy. The $Si_{0.7}Ge_{0.3}/Sio_2$ films were deposited on amorphous $SiO_{2}$ at $300^{\circ}C,400^{\circ}C,500^{\circ}C,600^{\circ}C,$ and $700^{\circ}C$ by Si-MBE. In the film deposited at $300^{\circ}C$, only amorphous phase were observed. In the film deposited at $400^{\circ}C$, both amorphous and polycrystalline films were observed. Both phases were deposited simultaneously, but, at initial film growth, amorphous phase prevailed over polycrystalline phase. As the film thickness increased, the fraction of polycrystalline phase increased. At $500^{\circ}C$, thin amorphous layer was observed at lOnm from $SiO_{2}$ surface. In the films deposited at higher than $600^{\circ}C$, only crystalline phase were observed. Polycrystalline films had columnar structure. Compositional uniformity for deposited films were good regardless of deposition temperature. The interfaces of $Si_{1-x}Ge_x/Sio_2$ were flat, whatever polycrystal or amorphous was deposited on $SiO_{2}$.

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Effects of plasma processes on the surface of Si(100) (Si(100) 표면에 대한 plasma 처리 효과)

  • 조재원;이재열
    • Journal of the Korean Vacuum Society
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    • v.8 no.1
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    • pp.20-25
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    • 1999
  • The effect of different plasma surface preparation and oxidation processes for the formation of $SiO_2-Si$(100) interfaces was studied using angle resolved uv-photoelectron spectroscopy. The surface preparation processes included ex situ preclean as well as in situ hydrogen plasma, which were compared to the processes of UHV annealing at high temperature. The spectral position of the oxide valence band features, with respect to the Fermi level. Were found to shift according to the different processes of surface preparation and oxidation. The shifts were analyzed in terms of band bending in the Si. Origins of the spectral shifts were considered to include defects at the $SiO_2Si$ interfaces and surface morphology(roughness) dependent on the surface preparation processes. From comparison of the ARUPS results of the various processes, it was concluded that the interface bonding of the silicon oxide-showed the lowest band bending.

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Formation Conditions of PZT Thin Films for ULSI -A study on the formation and characteristics of PZT thin films by rapid thermal annealing- (초고집적 회로용 PZT 박막의 형성조건 -스퍼터링법으로 Si, TiN/Ti/Si 기판위에 증착된 PZT 박막의 급속 열처리에 의한 결정화 및 특성-)

  • 마재평;박치선;백수현;황유상;백상훈;최진성;조현춘
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.30A no.10
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    • pp.59-66
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    • 1993
  • PZT thin film deposited by rf magnetron sputtering was annealed by rapid thermal process(RTP) in PbO ambient to prevent vaporing of Pb and interface reactions. Si and TiN/Ti/Si substrates were prepared to survey application of TiN/Ti layer which can prevent interface interaction with Si and crack of PZT thin films. As temperature increased. PZT thin films surface on Si substrate appeared more severe cracks which should affect electrical properties deadly. TiN/Ti(40-150${\mu}{\Omega}{\cdot}cm$) layer applied for buffer layer suppressed interface interaction and film cracking. The measured leakage current(LC) and breakdown voltage(BV) of PZT thin film on TiN/Ti/Si substrate annealed at 650$^{\circ}$C for 15 sec (thickness of 2500$\AA$) were 38 nA/cm2 and 3.5 MV/cm and dielectric constant was 310 at 1 MHz, and remanent polarization (Pr) and coercive field (Ec) were 6.4${\mu}C/cm^{2}$ and 0.2MV/cm at 60 Hz, respectively.

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Improvement of Negative Bias Temperature Instability by Decoupled Plasma Nitridation Process (Decoupled Plasma Nitridation 공정 적용을 통한 Negative Bias Temperature Instability 특성 개선)

  • Park, Ho-Woo;Roh, Yong-Han
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.18 no.10
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    • pp.883-890
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    • 2005
  • In this paper, the established model of NBTI (Negative Bias Temperature Instability) mechanism was reviewed. Based on this mechanism, then, the influence of nitrogen was discussed among other processes. A constant concentration of nitrogen exists inside $SiO_2$ in order to prevent boron from diffusing and to increase dielectric constant. It was shown that NBTI improvement was achieved by controlling nitrogen profile. It was supposed that the existence of low activation energy of Si-N bonds at $Si-SiO_2$ interface attributes the improvement by making hydrogen prevent interface traps. It was also shown that improvement of NBTI can be achieved by more effective control of nitrogen profile. It was supposed that the maximum control of nitrogen profile can be achieved by DPN (Decoupled Plasma Nitridation) process.

Formations and properties of MFIS structure using $LiNbO_3/Si_3N_4$ structure ($LiNbO_3/Si_3N_4$ 구조를 이용한 MFIS 구조의 형성 및 특성)

  • 김용성;정상현;정순원;이남열;김진규;김광호;유병곤;이원재;유인규
    • Proceedings of the IEEK Conference
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    • 2000.11b
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    • pp.221-224
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    • 2000
  • We have successfully demonstrated metal-ferroel-ectric-insulator-semiconductor (MFIS) devices using Al/LiNbO$_{3}$/SiN/Si structure. The SiN thin films were made into metal -insulator- semiconductor (MIS) devices by thermal evaporation of aluminum source in a dot away on the surface. The interface property of MFIS from 1MHz & quasistatic C-V is good and the memory window width is about 1.5V at 0.2V/s signal voltage sweep rate. The gate leakage current density of MFIS capacitors using a aluminum electrode showed the least value of 1x10$^{-8}$ A/$\textrm{cm}^2$ order at the electric field of 300㎸/cm. And the XRD patterns shows the probability of applications of LN for MFIS devices for FeRAMs on amorphous SiN buffer layer.

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Formation of ultra-thin $Ta_{2}O_{5}$ film on thermal silicon nitrides (열적 성장된 실리콘 질화막위에 산화 탄탈륨 초박막의 형성)

  • 이재성;류창명;강신원;이정희;이용현
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.11
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    • pp.35-43
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    • 1995
  • To obtain high quality of $Ta_{2}O_{5}$ film, two dielectric layers of $Si_{3}N_{4}$ and $Ta_{2}O_{5}$ were subsequently formed on Si wafer. Silicon nitride films were thermally grown in 10 Torr ammonia ambient by R.F induced heating system. The thickness of thermally grown $Si_{3}N_{4}$ film was able to be controlled in the range of tens $\AA$ due to the self-limited growth property. $Ta_{2}O_{5}$ film of 200$\AA$ thickness was then deposited on the as-grown $Si_{3}N_{4}$ film about 25$\AA$ thickness by sputtering method and annealed at $900^{\circ}C$in $O_{2}$ ambient for 1hr. Stoichiometry film was prepared by the annealing in oxygen ambient. Despite the high temperature anneal process, silicon oxide layer was not grown at the interface of the layered films because of the oxidation barrier effect of Si$_{3}$N$_{4}$ film. The fabricated $Ta_{2}O_{5}$/$Si_{3}N_{4}$ film showed low leakage current less than several nA and high dielectric breakdown strength.

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A study on Bubble-like Defects in Silicon Wafer Direct Bonding (실리콘 웨이퍼 직접 접합에서 기포형 접합 결합에 관한 연구)

  • Mun, Do-Min;Hong, Jin-Gyun;Yu, Hak-Do;Jeong, Hae-Do
    • Korean Journal of Materials Research
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    • v.11 no.3
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    • pp.159-163
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    • 2001
  • The success of SDB (silicon wafer direct bonding) technology can be estabilished by bonding on the bonded interface with no defects and Preventing temperature dependent bubbles. In this research, we observed the behavior of the intrinsic bubbles by transmitting the infrared light and the increase of the bubble pressure was found. And, the $SiO_2$-$SiO_2$ bonded wafer was achieved, which generates no intrinsic bubbles in the annealing under the atmospheric pressure. The intrinsic bubbles in the $SiO_2$-$SiO_2$ bonded wafer were generated in the annealing in the ultra high vacuum. This experimental result shows the relation between the bubble growth and the pressure.

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A Study on Carrier Injection and Trapping by the High Field for MAS (Al-Al2O3-Si(n)) Structure ($Al-Al_2O_3-Si$(N형)의 MAS 구조에 있어서 고전계에 의한 Carrier 주인과 트?에 관한 연구)

  • 이영희;박성희
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.35 no.10
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    • pp.465-472
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    • 1986
  • The present study was carried out to investigate the mechanism which control the voltage instability and the breakdown of CVD Al2O3 on Si substrates. Our sample were metal-Al2O3-Oi Capacitors with both Al and Au field plates. Electron injection and trapping, with resultant positive flatband voltage shift, occur at fields as low as 1-2[MV/cm.] We developed an approximate method for computing the location of the centroid of the trapped electrons. Our results indicate that the electrons are trapped near the injecting interface, at least for fields less than about 5[MV/cm ] Because of continued charging, a true steady state is probably never reached, and the only unique I-V curve is the one obtained initially, when the traps are empty. We measured this I-V curve for both polarities of applied voltage, using a fresh sample for each point. The observed current densities are much larger than those obtained in thermally grawn SiO2.

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