Journal of IKEEE (전기전자학회논문지)

Institute of Korean Electrical and Electronics Engineers (한국전기전자학회)
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A Study on ESD Protection Circuit with Bidirectional Structure with Latch-up Immunity due to High Holding Voltage

높은 홀딩 전압으로 인한 래치업 면역을 갖는 양방향 구조의 ESD 보호회로에 관한 연구

  • Jung, Jang-Han (Dept. of Electronics Engineering, Dankook University) ;
  • Do, Kyung-Il (Dept. of Electronics Engineering, Dankook University) ;
  • Jin, Seung-Hoo (Dept. of Electronics Engineering, Dankook University) ;
  • Go, Kyung-Jin (Dept. of Electronics Engineering, Dankook University) ;
  • Koo, Yong-Seo (Dept. of Electronics Engineering, Dankook University)
  • Received : 2021.05.31
  • Accepted : 2021.06.24
  • Published : 2021.06.30
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Abstract

In this paper, we propose a novel ESD protection device with Latch-up immunity properties due to high holding voltages by improving the structure of a typical SCR. To verify the characteristics of the proposed ESD circuit, simulations were conducted using Synopsys TCAD and presented compared to existing ESD protection circuits. Furthermore, the variation of electrical properties was verified using the design variable D1. Simulation results confirm that the proposed ESD protective circuit has higher holding voltage properties and bidirectional discharge properties compared to conventional ESD protective circuits. We validate the electrical properties with post-design TLP measurements using Samsung's 0.13um BCD process. And we verify that the proposed ESD protection circuit in this paper is well suited for high voltage applications in that it has a latch-up immunity due to improved holding voltage through optimization of design variables.

본 논문에서는 일반적인 SCR의 구조를 개선하여 높은 홀딩 전압으로 인한 래치 업면역 특성을 가지는 새로운 ESD 보호회로를 제안한다. 제안된 ESD회로의 특성검증을 위하여 Synopsys사의 TCAD를 이용하여 시뮬레이션을 진행하였으며, 기존 ESD 보호회로와 비교하여 제시하였다. 또한 설계변수 D1을 이용하여 전기적 특성의 변화를 검증하였다. 시뮬레이션 수행 결과 제안된 ESD 보호회로는 기존의 ESD 보호회로에 비해 높은 홀딩 전압특성과 양방향 방전특성을 확인하였다. 또한, Samsung의 0.13um BCD 공정을 이용하여 설계 후 TLP 측정을 통해 전기적 특성을 검증하였다. 이러한 과정을 통해 본 논문에서 제안된 ESD 보호회로 설계변수의 최적화를 진행하였고 향상된 홀딩 전압으로 래치 업 면역을 갖는다는 점에서 고전압 어플리케이션에 적용하기에 매우 적합함을 검증하였다.

Keywords

Acknowledgement

This research was supported by the MSIT(Ministry of Science and ICT), Korea, under the ITRC(Information Technology Research Center) support program(IITP-2020-2018-0-01421) supervised by the IITP(Institute for Information & Communications Technology Planning & Evaluation), This paper was supported by Korea Institute for Advancement of Technology (KIAT) grant funded by the Korea Government(MOTIE) (P0017011, HRD Program for Industrial Innovation)

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