DOI QR코드

DOI QR Code

커패시터의 비율과 무관하고 OP-Amp의 이득에 둔감한 CMOS Image Sensor용 Algorithmic ADC

Capacitor Ratio-Independent and OP-Amp Gain-Insensitive Algorithmic ADC for CMOS Image Sensor

  • Hong, Jaemin (Dept. of Electronics Engineering, Kookmin University) ;
  • Mo, Hyunsun (Dept. of Electronics Engineering, Kookmin University) ;
  • Kim, Daejeong (Dept. of Electronics Engineering, Kookmin University)
  • 투고 : 2020.08.24
  • 심사 : 2020.12.22
  • 발행 : 2020.12.31

초록

본 논문에서는 column-parallel readout 회로에 적합하도록 개선된 CMOS 이미지 센서용 algorithmic ADC를 제안한다. 커패시터의 비율과 무관하고 연산 증폭기의 이득에 둔감하면서 증폭기 하나로 동작 할 수 있도록 기존 algorithmic ADC를 수정하고 적응형 바이어싱을 적용한 증폭기를 사용하여 높은 변환효율을 갖도록 하였다. 제안하는 ADC는 0.18-㎛ 매그나칩 CMOS 공정으로 설계되었으며, Spectre 시뮬레이션을 통해 기존 algorithmic ADC에 비해 변환속도당 전력소모가 37% 줄어 들었음을 확인하였다.

In this paper, we propose an improved algorithmic ADC for CMOS Image Sensor that is suitable for a column-parallel readout circuit. The algorithm of the conventional algorithmic ADC is modified so that it can operate as a single amplifier while being independent of the capacitor ratio and insensitive to the gain of the op-amp, and it has a high conversion efficiency by using an adaptive biasing amplifier. The proposed ADC is designed with 0.18-um Magnachip CMOS process, Spectre simulation shows that the power consumption per conversion speed is reduced by 37% compared with the conventional algorithmic ADC.

키워드

참고문헌

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