A Low Power 16-Bit RISC Microprocessor Using ECRL Circuits

  • Shin, Young-Joon (Department of Electronic Engineering, Soongsil University) ;
  • Lee, Chan-Ho (Department of Electronic Engineering, Soongsil University) ;
  • Moon, Yong (Department of Electronic Engineering, Soongsil University)
  • 투고 : 2004.02.13
  • 발행 : 2004.12.31

초록

This paper presents a low power 16-bit adiabatic reduced instruction set computer (RISC) microprocessor with efficient charge recovery logic (ECRL) registers. The processor consists of registers, a control block, a register file, a program counter, and an arithmetic and logical unit (ALU). Adiabatic circuits based on ECRL are designed using a $0.35{\mu}m$ CMOS technology. An adiabatic latch based on ECRL is proposed for signal interfaces for the first time, and an efficient four-phase supply clock generator is designed to provide power for the adiabatic processor. A static CMOS processor with the same architecture is designed to compare the energy consumption of adiabatic and non-adiabatic microprocessors. Simulation results show that the power consumption of the adiabatic microprocessor is about 1/3 compared to that of the static CMOS microprocessor.

키워드

참고문헌

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