Journal of the Institute of Electronics Engineers of Korea SC (전자공학회논문지SC)

The Institute of Electronics and Information Engineers (대한전자공학회)
권호 표지

(Signal Integrity Verification of a General VLSI Interconnects using Virtual-Straight Line Model)

가상 직선 모델을 사용한 일반적 VLSI 배선의 신호의 무결성 검증

  • Jin, U-Jin (Dept. of Electronic computer Engineering, Hanyang University) ;
  • Eo, Yeong-Seon (Dept. of Electronic computer Engineering, Hanyang University) ;
  • Sim, Jong-In (Dept. of Electronic computer Engineering, Hanyang University)
  • 진우진 (한양대학교 전자컴퓨터공학부) ;
  • 어영선 (한양대학교 전자컴퓨터공학부) ;
  • 심종인 (한양대학교 전자컴퓨터공학부)
  • Published : 2002.03.01
Download PDF
⟨ Previous Next ⟩

Abstract

In this paper, a new virtual-straight line parameter determination methodology and fast time domain simulation technique for non-uniform interconnects are presented and verified. Time domain signal response of interconnects circuit considering the characteristic of non-linear transistor is performed by using model order reduction method. Since model order reduction method is peformed by using per unit length parameters, virtual- straight line parameters for non-uniform interconnects are determined. Its method is integrated into Berkeley SPICE and shown that time domain signal responses using proposed method have a good agreement with the results of conventional circuit simulator HSPICE. The proposed method can be efficiently employed in the high-performance VLSI circuit design since it can provide a fast and accurate time domain signal response of complicated multi - layer interconnects.

이 논문에서는 불규칙한 배선 구조에 대한 가상직선(virtual-straight line) 파라미터 추출 방법과 이를 이용한 새롭고 빠른 시간 영역에서의 시뮬레이션 방법론을 보이고 검증한다. 비선형인 트랜지스터의 특성을 고려한 인터컨넥트 회로의 시간영역에서의 신호응답은 모델차수감소법(model order reduction method)을 사용하여 수행된다. 모델차수감소법은 인터컨넥트 회로의 단위길이당 파라미터를 이용하므로 인터컨넥트의 길이가 서로 다르고 불규칙한 형태를 갖는 인터컨넥트에 대해서 직접적으로 모델차수감소법을 적용하기 위해 가상직선 모델을 사용하여 인터컨넥트의 파라미터를 추출한다. 또한 모델차수감소법은 일반적인 Berkeley SPICE의 모듈로 구성하여 인터컨넥트 회로의 시간영역 시간응답을 구하였으며 일반적인 회로 시뮬레이터인 HSPICE의 시뮬레이션 결과와 비교하여 잘 일치한다는 것을 보인다. 제안된 방법은 복잡한 다층 배선 구조에 대한 신속하고 정확한 시간영역 신호응답을 제공함으로써 고성능 VLSI 회로 설계에 유용하게 적용할 수 있다.

Keywords

References

  1. U. Ushiku, H. Kushibe, and H. Ono, 'Design Guide Line for Deep Sub-Micrometer Interconnections,' IEEE Proceedings of the 1990 VMIC., pp. 413-415, 1990
  2. The National Technology Roadmap Semiconductor Technology Needs, SIA Report, 1997
  3. H. B. Bakoglu, 'Interconnect for the 90s : System Level Electronic Issues,' IEDM 1992 Short Course : Interconnect for the 90s, San Jose, CA, 1992
  4. K. W. Goossen and R. B. Hammond, 'Modeling of Picosecond Pulse Propagation in Microstrip Interconnections on Integrated Circuits,' IEEE Trans. MTT., vol. 37, No. 3, pp. 469-478, Mar. 1989 https://doi.org/10.1109/22.21616
  5. T. Sakurai, 'Closed-Form Expressions for Interconnection Delay, Coupling, and Crosstalk in VLSI's,' IEEE Trans. ED., vol. 40, No. 1, pp. 118-124, Jan. 1993 https://doi.org/10.1109/16.249433
  6. H. Hasegawa, M. Furukawa, and H. Yanai, 'Properties of Microstrip Line on $Si-SiO_2$ System,' IEEE Trans. MTT., vol. MTT-19, No. 11, pp 869-881, Nov. 1971
  7. W. T. Weeks, 'Calculation of Coefficients of Capacitance of Multiconductor Transmission Lines in the Presence of a Dielectric Interface,' IEEE Trans. MTT., vol. MTT-18, No. 1, pp. 35-43, Jan. 1970
  8. J-H. Chern, J. Huang, L. Arledge, P-C. Li, and P. Yang, 'Multilevel Metal Capacitance Model for CAD Design Synthesis Systems,' IEEE EDL., vol. 13, No. 1, pp. 32-34, Jan. 1992 https://doi.org/10.1109/55.144942
  9. Y. Eo and W. R. Eisenstadt, 'High-Speed VLSI Interconnect Modeling Based on S-Parameter Measurements,' IEEE Trans. CPMT, vol. 16, No. 5, pp. 555-562, Aug. 1993 https://doi.org/10.1109/33.239889
  10. D. Sylvester, J. C. Chen, and C. Hu, 'Investigation of Interconnect Capacitance Characterization Using Charge-Based Capacitance Measurement(CBCM) Technique and Three-Dimensional Simulation,' IEEE JSSC, vol. 33, No. 13, pp. 449-453, Mar. 1998 https://doi.org/10.1109/4.661210
  11. J. C. Chen, D. Sylvester, and C. Hu, 'An On-Chip, Interconnect Capacitance Characterization Method with Sub-Femto-Farad Resolution,' IEEE Trans. SM., vol. 11, No. 2, pp. 204-209, May 1998 https://doi.org/10.1109/66.670160
  12. H. A. Wheeler, 'Transmission-Line Properties of a Strip on a Dielectric Sheet on a Plane,' IEEE Trans. MTT, vol. MTT-25, no. 8, pp. 631-647, Aug. 1977
  13. L. T. Pillage and R. A. Rohrer, 'Asymptotic Waveform Evaluation for Timing Analysis,' IEEE Trans. CAD, vol. 9, no. 4, pp. 352-366, Apr. 1990 https://doi.org/10.1109/43.45867
  14. S. Lin and E. S. Kuh, 'Transient Simulation of Lossy Interconnects Based on the Recursive Convolution Formulation,' IEEE Trans. CAS., vol. 39, no. 11, pp. 879-892, Nov. 1992 https://doi.org/10.1109/81.199887
  15. R. Gupta, B. Krauter, and L. T. Pileggi, 'Transmission Line Synthesis via Constrained Multivariable Optimization,' IEEE Trans. CAD, vol. 16, No. 1, pp. 6-19, Jan. 1997 https://doi.org/10.1109/43.559328
  16. R. Gupta, B. Tutuianu, and L. T. Pileggi, 'The Elmore Delayas a Bound for RC Trees with Generalized Input Signals,' IEEE Trans. CAD, vol. 16, No. 1, pp. 95-104, Jan. 1997 https://doi.org/10.1109/43.559334
  17. Q. Yu and E. S. Kuh, 'Exact Moment Matching Model of Delay Transmission Lines and Application to Interconnect Delay Estimation,' IEEE Trans. VLSI Systems, vol. 3, no. 2, pp. 311-322, Jun. 1995 https://doi.org/10.1109/92.386230
  18. A. E. Ruehli and P. A. Brennan, 'Capacitance Models for Integrated Circuit Metalization Wires,' IEEE JSSC., vol. sc-10, No. 6, pp. 530-536, Dec. 1975
  19. C. Wei, R. H. Harrington, J. R. Mautz, and T. K. Sarkar, 'Multiconductor transmission Lines in Multilayered Dielectric Media,' IEEE Trans. MTT, vol. 32, no. 4, pp. 439-450, Apr. 1984 https://doi.org/10.1109/TMTT.1984.1132696
  20. P. J. Van Wijnen, H. R. Claessen, and E. A. Wolsheimer, 'A New Straightforward Calibration and Correction Procedure for on wafer High Frequency S-Parameter Measurements (45MHz-18GHz),' IEEE Proceedings of the 1987 BCTM., pp. 70-73, 1987
  21. M. Sadiku, Numerical Techniques in Electromagetics, CRC press, 1992
  22. MAXWELL 3D Parameter Extractor User's Reference, Pittsburgh, TA : Ansoft, 1994
  23. Y. Kim, Y. Park, Y. Eo et al., 'Simulator for interconnects and general multilane analysis (SIGMA) : Simulation algorithm of lossy multiple transmission lines,' J. of Kor. Phys. Society, vol. 33, pp. 129-134, Nov. 1998