• 제목/요약/키워드: silicon substrate effect

검색결과 255건 처리시간 0.025초

탄소나노튜브 길이 변화에 대한 확산방지층과 박막 증착 온도의 영향 (The Effect of Diffusion Barrier and thin Film Deposition Temperature on Change of Carbon Nanotubes Length)

  • 홍순규;이형우
    • 한국분말재료학회지
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    • 제24권3호
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    • pp.248-253
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    • 2017
  • In this study, we investigate the effect of the diffusion barrier and substrate temperature on the length of carbon nanotubes. For synthesizing vertically aligned carbon nanotubes, thermal chemical vapor deposition is used and a substrate with a catalytic layer and a buffer layer is prepared using an e-beam evaporator. The length of the carbon nanotubes synthesized on the catalytic layer/diffusion barrier on the silicon substrate is longer than that without a diffusion barrier because the diffusion barrier prevents generation of silicon carbide from the diffusion of carbon atoms into the silicon substrate. The deposition temperature of the catalyst and alumina are varied from room temperature to $150^{\circ}C$, $200^{\circ}C$, and $250^{\circ}C$. On increasing the substrate temperature on depositing the buffer layer on the silicon substrate, shorter carbon nanotubes are obtained owing to the increased bonding force between the buffer layer and silicon substrate. The reason why different lengths of carbon nanotubes are obtained is that the higher bonding force between the buffer layer and the substrate layer prevents uniformity of catalytic islands for synthesizing carbon nanotubes.

The Effects of Impurities in Silicon Nitride Substrate on Tribological Behavior between Diamond Film and Silicon Nitride Ball

  • Lim, Dae-Soon;Kim, Jong-Hoon
    • Tribology and Lubricants
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    • 제11권5호
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    • pp.20-25
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    • 1995
  • Diamond films were prepared by a hot filament vapor deposition onto polycrystal silicon nitride substrates. Different kinds of silicon nitride containing CaO and $Fe_{2}O_{3}$ were manufactured to investigate the impurity effect of substrate on the morphology of diamond films and their wear behaviors. Nucleation rates and morphologies of diamond films deposited on various kinds of silicon nitride were compared. The highest nucleation rate was observed in a substrate containing 1% of CaO. Wear tests were performed with a silicon nitride ball on the disk geometry to investigate the tribological behavior of diamond film against silicon nitride. This study demonstrated that different morphologies of diamond film due to substrate impurities produced different wear behavior against silicon nitride.

Al 박막을 이용한 다결정 Si 박막의 제조에서 기판온도 영향 연구 (Effect of Substrate Temperature on Polycrystalline Silicon Film Deposited on Al Layer)

  • 안경민;강승모;안병태
    • 한국신재생에너지학회:학술대회논문집
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    • 한국신재생에너지학회 2010년도 춘계학술대회 초록집
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    • pp.96.2-96.2
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    • 2010
  • The surface morphology and structural properties of polycrystalline silicon (poly-Si) films made in-situ aluminum induced crystallization at various substrate temperature (300~600) was investigated. Silicon films were deposited by hot-wire chemical vapor deposition (HWCVD), as the catalytic or pyrolytic decomposition of precursor gases SiH4 occurs only on the surface of the heated wire. Aluminum films were deposited by DC magnetron sputtering at room temperature. continuous poly-Si films were achieved at low temperature. from cross-section TEM analyses, It was confirmed that poly-Si above $450^{\circ}C$ was successfully grown on and poly-Si films had (111) preferred orientation. As substrate temperature increases, Si(111)/Si(220) ratio was decreased. The electrical properties of poly-Si film were investigated by Hall effect measurement. Poly-Si film was p-type by Al and resistivity and hall effect mobility was affected by substrate temperature.

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ZnO ALE를 위한 Si, sapphire기판의 ECR 플라즈마 전처리 (ECR Plasma Pretreatment on Sapphire and Silicon Substrates for ZnO ALE)

  • 임종민;신경철;이종무
    • 한국재료학회지
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    • 제14권5호
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    • pp.363-367
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    • 2004
  • Recently ZnO epitaxial layers have been widely studied as a semiconductor material for optoelectronic devices. Sapphire and silicon are commonly selected as substrate materials for ZnO epitaxial growth. In this communication, we report the effect of the ECR plasma pretreatment of sapphire and silicon substrates on the nucleation in the ZnO ALE (atomic layer epitaxy). It was found that ECR plasma pretreatment reduces the incubation period of the ZnO nucleation. Oxygen ECR plasma enhances ZnO nucleation most effectively since it increases the hydroxyl group density at the substrate surface. The nucleation enhancing effect of the oxygen ECR plasma treatment is stronger on the sapphire substrate than on the silicon substrate since the saturation density of the hydroxyl group is lower at the sapphire surface than that at the silicon surface.

초고진공 전자 사이클로트론 화학 기상 증착 장치에 의한 저온 실리콘 에피 성장에 기판 DC 바이어스가 미치는 영향 (The Effect of Substrate DC Bias on the Low -Temperature Si homoepitaxy in a Ultrahigh Vacuum Electron Cyclotron Resonance Chemical Vapor Deposition)

  • 태흥식;황석희;박상준;윤의준;황기웅;송세안
    • 한국진공학회지
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    • 제2권4호
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    • pp.501-506
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    • 1993
  • The spatial potential distribution of electron cyclotron resonance plasma is measured as a function of tehsubstrate DC bias by Langmuir probe method. It is observed that the substrate DC bias changes the slope of the plasma potential near the subsrate, resulting in changes in flux and energy of the impinging ions across plasma $_strate boundary along themagnetric field. The effect of the substrate DC bias on the low-temperature silicon homoepitaxy (below $560^{\circ}C$) is examine dby in situ reflection high energy electron diffraction (RHEED), cross-section transmission electron microscopy (XTEM),plan-view TEM and high resolution transmision electron microscopy(HRTEM). While the polycrystalline silicon layers are grow withnegative substrate biases, the single crystaline silicon layers are grown with negative substrate biases, the singel crystalline silicon layers are grown with positive substrate biases. As the substrate bias changes form negative to positive values, the growth rate decreases. It is concluded that the control of the ion energy during plasma deposition is very important in silicon epitaxy at low temperatures below $560^{\circ}C$ by UHV-ECRCVD.VD.

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실리콘 기판 효과를 고려한 VLSI 인터컨넥트의 전송선 파라미터 추출 및 시그널 인테그러티 검증 (Transmission Line Parameter Extraction and Signal Integrity Verification of VLSI Interconnects Under Silicon Substrate Effect)

  • 유한종;어영선
    • 전자공학회논문지C
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    • 제36C권3호
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    • pp.26-34
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    • 1999
  • 실리콘 집적회로 인터컨넥트에서 전송선 파라미터를 추출하는 새로운 방법을 제시하고 이를 실험적으로 고찰 한다. 실리콘 기판 위에 있는 전송선에서의 신호는 PCB (printed circuit board)혹은 MCM (multi-chip module)의 인터컨넥트와 같은 마이크로 스트립 구조에서 가정하는 quasi-TEM 모드가 아니라 slow wave mode (SWM)로 대부분의 에너지가 전송되기 때문에 기판의 효과를 고려하여 전송선 파라미터를 추출한다. 실리콘 기판에서 전계 및 자계의 특성을 고려하여 커패시턴스 파라미터의 계산을 실리콘 표면을 그라운드로 설정하고 계산하고 인덕턴스는 단일 전송선 모델로부터 추출한 실효 유전상수를 도입하여 계산한다. 제안한 전송선 파라미터 추출 방법의 타당성을 검증하기 위하여 테스트 패턴을 제작하여 실험적 파리미터 추출 값이 제시한 방법의 결과와 약 10% 이내에서 일치한다는 것을 보여 계산 방법의 타당성을 입증한다. 또한 고속 샘플링 오실로스코프(TDR/TDT 메터) 측정을 통하여 제시한 방법이 크로스톡 노이즈를 정확히 예측 할 수 있는 반면 흔히 사용하고 있는 기판의 효과를 고려하지 않는 RC 모델 혹은 ? 모델은 약 20∼25% 정도 과소 오차(underestimation error)를 보인다는 것을 보인다.

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표면 텍스쳐링 크기와 밀도가 후면 전극 실리콘 태양전지에 미치는 영향 (A effect of the back contact silicon solar cell with surface texturing size and density)

  • 장왕근;장윤석;박정호
    • 한국신재생에너지학회:학술대회논문집
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    • 한국신재생에너지학회 2011년도 춘계학술대회 초록집
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    • pp.112.1-112.1
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    • 2011
  • The back contact solar cell (BCSC) has several advantages compared to the conventional solar cell since it can reduce grid shadowing loss and contact resistance between the electrode and the silicon substrate. This paper presents the effect of the surface texturing of the silicon BCSC by varying the texturing depth or the texturing gap in the commercially available simulation software, ATHENA and ATLAS of the company SILVACO. The texturing depth was varied from $5{\mu}m$ to $150{\mu}m$ and the texturing gap was varied from $1{\mu}m$ to $100{\mu}m$ in the simulation. The resulting efficiency of the silicon BCSC was evaluated depending on the texturing condition. The quantum efficiency and the I-V curve of the designed silicon BCSC was also obtained for the analysis since they are closely related with the solar cell efficiency. Other parameters of the simulated silicon BCSC are as follows. The substrate was an n-type silicon, which was doped with phosphorous at $6{\times}10^{15}cm^{-3}$, and its thickness was $180{\mu}m$, a typical thickness of commercial solar cell substrate thickness. The back surface field (BSF) was $1{\times}10^{20}\;cm^{-3}$ and the doping concentration of a boron doped emitter was $8.5{\times}10^{19}\;cm^{-3}$. The pitch of the silicon BCSC was $1250{\mu}m$ and the anti-reflection coating (ARC) SiN thickness was $0.079{\mu}m$. It was assumed that the texturing was anisotropic etching of crystalline silicon, resulting in texturing angle of 54.7 degrees. The best efficiency was 25.6264% when texturing depth was $50{\mu}m$ with zero texturing gap in case of low texturing depth (< $100{\mu}m$).

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EFFECT OF $SiF_4$ADDITION ON THE STRUCTURES OF SILICON FILMS DEPOSITED AT LOW TEMPERATURE BY REMOTE PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION

  • Xiaodong Li;Park, Young-Bae;Kim, Dong-Hwan;Rhee, Shi-Woo
    • 한국진공학회지
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    • 제4권S2호
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    • pp.64-68
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    • 1995
  • Silicon films were deposited at $430^{\circ}C$ by remote plasma chemical vapor deposition(RPECVD) with a gas mixture of $Si_2H_6/SiF_4/H_2$. The silicon films deposited without and with $SiF_4$ were characterized using atomic force microscopy(AFM), transmission electron microscopy(TEM) and X-ray diffraction(XRD). Both silicon films have the same rugged surface morphology, but, the silicon film deposited with $SiF_4$ exhibits more rugged. The silicon film deposited without $SiF_4$ is amorphous, whereas the silicon film deposited with $SiF_4$ is polycrystalline with very small needle-like grains which are perpendicular to the substrate and uniformly distributed in the thickness of the film. The silicon film deposited with $SiF_4$ was found to have a preferred orientation along the growth direction with the<110> of the film parallel to the <111> of the substrate. The effect of $SiF_4$ during RPECVD was discussed.

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Strained-Silicon-on-Insulator (sSOI) 기판을 이용한 Capacitorless 1-Transistor DRAM 소자 (A Capacitorless 1-Transistor DRAM Device using Strained-Silicon-on-Insulator (sSOI) Substrate)

  • 김민수;오준석;정종완;이영희;정홍배;조원주
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.95-96
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    • 2009
  • A fully depleted capacitorless 1-transistor dynamic random access memory (FD 1T-DRAM) based on a sSOI strained-silicon-on-insulator) wafer was investigated. The fabricated device showed excellent electrical characteristics of transistor such as low leakage current, low subthreshold swing, large on/off current ratio, and high electron mobility. The FD sSOI 1T-DRAM can be operated as memory device by the floating body effect when the substrate bias of -15 V is applied, and the FD sSOI 1T-DRAM showed large sensing margin and several milli seconds data retention time.

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The Effect of Initial DC Bias Voltage on Highly Oriented Diamond Film Growth on Silicon

  • Dae Hwan Kang;Seok Hong Min;Ki Bum Kim
    • The Korean Journal of Ceramics
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    • 제3권1호
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    • pp.13-17
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    • 1997
  • It is identified that the diamond films grown o bias-treated (100) silicon showed different surface morphologies and film textures according to the initial applied dc bias voltage at the same growth condition. The highly oriented diamond film (HODF) was successfully grown on -200 V bias-treated silicon substrate in which the heteroepitaxial relation of $(100)_{dimond}//(100)_{si}\; and\; [110]_{diamond}//[110]_{si}$ was identified. On the contrary, the heteroepitaxial relation was considerably disturbed in the samples bias-voltage was a key factor in growing the highly oriented diamond film on (100) silicon substrate. Considering the experimental results, we proposed a new model about heteroepitaxial diamond growth on silicon, in which 9 diamond unit cell are matched with 4 silicon cells and the bond covalency of both atoms is satisfied via the intermediate layer at the interface as well.

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