• Title/Summary/Keyword: write

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Page Replacement Policy of DRAM&PCM Hybrid Memory Using Two Locality (지역성을 이용한 하이브리드 메모리 페이지 교체 정책)

  • Jung, Bo-Sung;Lee, Jung-Hoon
    • IEMEK Journal of Embedded Systems and Applications
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    • v.12 no.3
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    • pp.169-176
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    • 2017
  • To replace conventional DRAM, many researches have been done on nonvolatile memories. The DRAM&PCM hybrid memory is one of the effective structure because it can utilize an advantage of DRAM and PCM. However, in order to use this characteristics, pages can be replaced frequently between DRAM and PCM. Therefore, PCM still has major problem that has write-limits. Therefore, it needs an effective page management method for exploiting each memory characteristics dynamically and adaptively. So we aim reducing an average access time and write count of PCM by utilizing two locality for an effective page replacement. We proposed a page selection algorithm which is recently requested to write in DRAM and an algorithm witch uses two locality in PCM. According to our simulation, the proposed algorithm for the DRAM&PCM hybrid can reduce the PCM write count by around 22% and the average access time by 31% given the same PCM size, compared with CLOCK-DWF algorithm.

SSR (Simple Sector Remapper) the fault tolerant FTL algorithm for NAND flash memory

  • Lee, Gui-Young;Kim, Bumsoo;Kim, Shin-han;Byungsoo Jung
    • Proceedings of the IEEK Conference
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    • 2002.07b
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    • pp.932-935
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    • 2002
  • In this paper, we introduce new FTL(Flash Translation Layer) driver algorithm that tolerate the power off errors. FTL driver is the software that provide the block device interface to the upper layer software such as file systems or application programs that using the flash memory as a block device interfaced storage. Usually, the flash memory is used as the storage devices of the mobile system due to its low power consumption and small form factor. In mobile system, the state of the power supplement is not stable, because it using the small sized battery that has limited capacity. So, a sudden power off failure can be occurred when we read or write the data on the flash memory. During the write operation, power off failure may introduce the incomplete write operation. Incomplete write operation denotes the inconsistency of the data in flash memory. To provide the stable storage facility with flash memory in mobile system, FTL should provide the fault tolerance against the power off failure. SSR (Simple Sector Remapper) is a fault tolerant FTL driver that provides block device interface and also provides tolerance against power off errors.

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Recency and Frequency based Page Management on Hybrid Main Memory

  • Kim, Sungho;Kwak, Jong Wook
    • Journal of the Korea Society of Computer and Information
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    • v.23 no.3
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    • pp.1-8
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    • 2018
  • In this paper, we propose a new page replacement policy using recency and frequency on hybrid main memory. The proposal has two features. First, when a page fault occurs in the main memory, the proposal allocates it to DRAM, regardless of operation types such as read or write. The page allocated by the page fault is likely to be high probability of re-reference in the near future. Our allocation can reduce the frequency of write operations in PCM. Second, if the write operations are frequently performed on pages of PCM, the pages are migrated from PCM to DRAM. Otherwise, the pages are maintained in PCM, to reduce the number of unnecessary page migrations from PCM. In our experiments, the proposal reduced the number of page migrations from PCM about 32.12% on average and reduced the number of write operations in PCM about 44.64% on average, compared to CLOCK-DWF. Moreover, the proposal reduced the energy consumption about 15.61%, and 3.04%, compared to other page replacement policies.

Reliability Improvement of the Tag Bits of the Cache Memory against the Soft Errors (소프트 에러에 대한 캐쉬 메모리의 태그 비트 신뢰성 향상 기법)

  • Kim, Young-Ung
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.14 no.1
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    • pp.15-21
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    • 2014
  • Due to the development of manufacturing technology scaling, more transistors can be placed on a cache memories of a processor. However, processors become more vulnerable to the soft errors because of highly integrated transistors, the reliability of cache memory must consider seriously at the design level. Various researches are proposed to overcome the vulnerability of soft error, but researches of tag bit are proposed very rarely. In this paper, we revaluate the reliability improvement technique for tag bit, and analyse the protection rate of write-back operation, which is a typical case of not satisfying temporal locality. We also propose the methodology to improve the protection rate of write-back operation. The experiments of the proposed scheme shows up to 76.8% protection rate without performance degradations.

An Efficient Variable Rearrangement Technique for STT-RAM Based Hybrid Caches

  • Youn, Jonghee M.;Cho, Doosan
    • IEMEK Journal of Embedded Systems and Applications
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    • v.11 no.2
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    • pp.67-78
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    • 2016
  • The emerging Spin-Transfer Torque RAM (STT-RAM) is a promising component that can be used to improve the efficiency as a result of its high storage density and low leakage power. However, the state-of-the-art STT-RAM is not ready to replace SRAM technology due to the negative effect of its write operations. The write operations require longer latency and more power than the same operations in SRAM. Therefore, a hybrid cache with SRAM and STT-RAM technologies is proposed to obtain the benefits of STT-RAM while minimizing its negative effects by using SRAM. To efficiently use of the hybrid cache, it is important to place write intensive data onto the cache. Such data should be placed on SRAM to minimize the negative effect. Thus, we propose a technique that optimizes placement of data in main memory. It drives the proper combination of advantages and disadvantages for SRAM and STT-RAM in the hybrid cache. As a result of the proposed technique, write intensive data are loaded to SRAM and read intensive data are loaded to STT-RAM. In addition, our technique also optimizes temporal locality to minimize conflict misses. Therefore, it improves performance and energy consumption of the hybrid cache architecture in a certain range.

A Study on WSDL Document Structure in Web Services (웹 서비스에서의 WSDL 문서 구문에 대한 연구)

  • Hwang Eui-Chul
    • Proceedings of the Korea Contents Association Conference
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    • 2005.11a
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    • pp.234-238
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    • 2005
  • The WSDL is the specifications which defines the fact that must describe a web service how with the XML. It uses the WSDL and the client discovers a web service and the opening to the public function which the web service provides calling there is a possibility of doing. In this paper application shows the WSDL definition of a simple service providing Slip data process. The service supports a triple web method called WriteSlipXMLFromSql, WriteSlipXMLFromSqlProc, InsertSlipDataToDb which is deployed using the SOAP protocol over HTTP. In this paper, Our proposed web services are expected to contribute to constructing useful world wide web services which are essential in building E-Commerce society.

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A Data-Consistency Scheme for the Distributed-Cache Storage of the Memcached System

  • Liao, Jianwei;Peng, Xiaoning
    • Journal of Computing Science and Engineering
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    • v.11 no.3
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    • pp.92-99
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    • 2017
  • Memcached, commonly used to speed up the data access in big-data and Internet-web applications, is a system software of the distributed-cache mechanism. But it is subject to the severe challenge of the loss of recently uncommitted updates in the case where the Memcached servers crash due to some reason. Although the replica scheme and the disk-log-based replay mechanism have been proposed to overcome this problem, they generate either the overhead of the replica synchronization or the persistent-storage overhead that is caused by flushing related logs. This paper proposes a scheme of backing up the write requests (i.e., set and add) on the Memcached client side, to reduce the overhead resulting from the making of disk-log records or performing the replica consistency. If the Memcached server fails, a timestamp-based recovery mechanism is then introduced to replay the write requests (buffered by relevant clients), for regaining the lost-data updates on the rebooted Memcached server, thereby meeting the data-consistency requirement. More importantly, compared with the mechanism of logging the write requests to the persistent storage of the master server and the server-replication scheme, the newly proposed approach of backing up the logs on the client side can greatly decrease the time overhead by up to 116.8% when processing the write workloads.

Micromagnetic Computer Simulation of Ultra-high density Recording with the Use of a Planar-type Head

  • S.H. Lim;Kim, H.J.
    • Journal of Magnetics
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    • v.6 no.4
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    • pp.109-118
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    • 2001
  • A computer simulation, utilizing the Landau-Lifshitz-Gilbert equation, of ultra-high- density recording on continuous longitudinal media is carried out. The two important features of this work are the use of a planar-type head, which enables a high write field of 14183 Oe ts be generated at the center of the recording medium, and the media with very high coercivities up to 13010 Oe. From a systematic investigation, it is found that the optimum write field is higher than the medium coercivity by only 3400 Oe over a wide coercivity range. This new finding allows one to write an a medium with a very high coercivity by using a planar-type head. It is demonstrated that a reasonably good bit pattern with a bit density of 605 kfci is generated on the medium with a coercivity of l1720 Oe, and, combined with a high track pitch density of 100 ktpi, a recording density of 60 Gb/in$^2$can be obtained in a single layer medium. With an improved write- head designs even a higher recording density of 75 Gb/in$^2$may be possible since comparison of the results for the bit pattern from the present head profile and the ideal Lindholm profile indicates an increase in the track pitch density of about 27%. Even at this density, the thermal stability parameter (KV/kT) at room temperature is high enough (60) to provide ample room for thermal stability.

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Dynamic Load Balancing and Network Adaptive Virtual Storage Service for Mobile Appliances

  • Ong, Ivy;Lim, Hyo-Taek
    • Journal of Information Processing Systems
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    • v.7 no.1
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    • pp.53-62
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    • 2011
  • With the steady growth of mobile technology and applications, demand for more storage in mobile devices has also increased. A lightweight block-level protocol, Internet Advanced Technology Attachment (iATA), has been developed to deliver a cost-effective storage network solution for mobile devices to obtain more storage. This paper seeks to contribute to designing and implementing Load Balancing (LB), Network Monitoring (NM) and Write Replication (WR) modules to improve the protocol's scalability and data availability. LB and NM modules are invoked to collect system resources states and current network status at each associate node (server machine). A dynamic weight factor is calculated based on the collected information and sent to a referral server. The referral server is responsible to analyze and allocate the most ideal node with the least weight to serve the client. With this approach, the client can avoid connecting to a heavily loaded node that may cause delays in subsequent in-band I/O operations. Write replication is applied to the remaining nodes through a WR module by utilizing the Unison file synchronization program. A client initially connected to node IP A for write operations will have no hindrances in executing the relevant read operations at node IP B in new connections. In the worst case scenario of a node crashing, data remain recoverable from other functioning nodes. We have conducted several benchmark tests and our results are evaluated and verified in a later section.

Massive RFID Tag Write Technique using Parallel Deployment of Readers (리더 병렬 배치를 이용한 대량 RFID 태그 쓰기 기법)

  • Lim, Young-Jun;Song, Ha-Joo;Kwon, Oh-Heum
    • The Journal of the Korea institute of electronic communication sciences
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    • v.7 no.6
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    • pp.1493-1498
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    • 2012
  • RFID technology plays an important role in building a ubiquitous environment. As RFID tags are widely used, it is necessary to enhance the performance of massive tag writes. A tag write tends to fail since it is performed through the weak radio wave communication. In this paper, we propose a write scheme that to enhance the performance of massive RFID tag writes. In proposed scheme, tag writes performed in parallel by multiple readers connected to a middleware. Write operations are distributed among readers and tags are written in groups. We show that proposed scheme can increase the success ratio of massive tag writes through experimental tests.