• Journal of the Korean Society of Manufacturing Process Engineers
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• v.18 no.4
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• pp.62-68
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• 2019

The aim of this study was to interpret the structure and dynamics of a transfer shuttle system as a material supply device for small machine tools. The following conclusions were obtained by performing a structural interpretation of the material supply equipment with respect to workload and the dynamical interpretation of a flexible multibody carriage shuttle. When a 1,000-kg workload was applied to a fork lift, the safety factor was approximately 1.86. To conservatively assess the integrity of the structure, a 1,000-kg workload would be proper. In the case of a deflection of the fork system, the width increased with increasing time. The greatest deflection occurred at 5.5 s, which was the largest increase in the time point of the fork system.

• Progress in Superconductivity
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• v.11 no.1
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• pp.36-41
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• 2009

Superconducting quantum phenomena are getting attention from the field of metrology area. Following its first successful application of Josephson effect to voltage standard, piconewton force standard was suggested as a candidate for the next application of superconducting quantum effects in metrology. It is predicted that a micron-sized superconducting Nb ring in a strong magnetic field gradient generates a quantized force of the order of sub-piconewtons. In this work, we studied the design and fabrication of Nb superconducting quantum interference device (SQUID) on an ultra-thin silicon cantilever. The Nb SQUID and electrodes were structured on a silicon-on-insulator (SOI) wafer by dc magnetron sputtering and lift-off lithography. Using the resulting SOI wafer, we fabricated V-shaped and parallel-beam cantilevers, each with a $30-{\mu}m$-wide paddle; the length, width, and thickness of each cantilever arm were typically $440{\mu}m,\;4.5{\mu}m$, and $0.34{\mu}m$, respectively. However, the cantilevers underwent bending, a technical difficulty commonly encountered during the fabrication of electrical circuits on ultra-soft mechanical substrates. In order to circumvent this difficulty, we controlled the Ar pressure during Nb sputtering to minimize the intrinsic stress in the Nb film and studied the effect of residual stress on the resultant device.

• ETRI Journal
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• v.34 no.6
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• pp.962-965
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• 2012

In this letter, we propose a new RESURF stepped oxide (RSO) process to make a semi-superjunction (semi-SJ) trench double-diffused MOSFET (TDMOS). In this new process, the thick single insulation layer ($SiO_2$) of a conventional device is replaced by a multilayered insulator ($SiO_2/SiN_x/TEOS$) to improve the process and electrical properties. To compare the electrical properties of the conventional RSO TDMOS to those of the proposed TDMOS, that is, the nitride_RSO TDMOS, simulation studies are performed using a TCAD simulator. The nitride_RSO TDMOS has superior properties compared to those of the RSO TDMOS, in terms of drain current and on-resistance, owing to a high nitride permittivity. Moreover, variations in the electrical properties of the nitride_RSO TDMOS are investigated using various devices, pitch sizes, and thicknesses of the insulator. Along with an increase of the device pitch size and the thickness of the insulator, the breakdown voltage slowly improves due to a vertical field plate effect; however, the drain current and on-resistance degenerate, owing to a shrinking of the drift width. The nitride_RSO TDMOS is successfully fabricated, and the blocking voltage and specific on-resistance are 108 V and $1.1m{\Omega}cm^2$, respectively.

• Journal of Power Electronics
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• v.16 no.2
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• pp.553-563
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• 2016

This paper presents a digital hardware implementation of a real-time simulator for a multiphase drive using a field-programmable gate array (FPGA) device. The simulator was developed with a modular and hierarchical design using very high-speed integrated circuit hardware description language (VHDL). Hence, this simulator is flexible and portable. A state-space representation model suitable for FPGA implementations was proposed for a dual three-phase induction machine (DTPIM). The simulator also models a two-level 12-pulse insulated-gate bipolar transistor (IGBT)-based voltage-source converter (VSC), a pulse-width modulation scheme, and a measurement system. Real-time simulation outputs (stator currents and rotor speed) were validated under steady-state and transient conditions using as reference an experimental test bench based on a DTPIM with 15 kW-rated power. The accuracy of the proposed digital hardware implementation was evaluated according to the simulation and experimental results. Finally, statistical performance parameters were provided to analyze the efficiency of the proposed DTPIM hardware implementation method.

• Progress in Superconductivity and Cryogenics
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• v.23 no.4
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• pp.30-34
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• 2021

Superconducting magnets have paved the way for opening new horizons in designing an electromagnet of a high field magnetic resonance imaging (MRI) device. In the first phase of the superconducting MRI magnet era, low-temperature superconductor (LTS) has played a key role in constructing the main magnet of an MRI device. The highest magnetic resonance (MR) field of 11.7 T was indeed reached using LTS, which is generated by the well-known Iseult project. However, as the limit of current carrying capacity and mechanical robustness under a high field environment is revealed, it is widely believed that commercial LTS wires would be challenging to manufacture a high field (>10 T) MRI magnet. As a result, high-temperature superconductor together with the conducting cooling approach has been spotlighted as a promising alternative to the conventional LTS. In 2020, the Korean government launched a national project to develop an HTS magnet for a high field MRI magnet as an extent of this interest. We have performed a design study of a 7 T 320 mm winding bore HTS MRI magnet, which may be the ultimate goal of this project. Thus, in this paper, design study results are provided. Electromagnetic design and analysis were performed considering the requirements of central magnetic field and spatial field uniformity.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.33 no.1
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• pp.78-82
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• 2020

In this study, MOSFETs fabricated on Si-doped, MBE-grown β-Ga₂O₃ are demonstrated. A Si-doped Ga₂O₃ epitaxial layer was grown on a Fe-doped, semi-insulating 1.5 cm × 1 cm Ga₂O₃ substrate using molecular beam epitaxy (MBE). The fabricated devices are circular type MOSFETs with a gate length of 3 ㎛, a source-drain spacing of 20 ㎛, and a gate width of 523 ㎛. The device exhibited a good pinch-off characteristic, a high on-off drain current ratio of approximately 2.7×10⁹, and a high breakdown voltage of 1,080 V, which demonstrates the potential of Ga₂O₃ for power device applications including electric vehicles, railways, and renewable energy.

• Korean Journal of Computational Design and Engineering
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• v.9 no.4
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• pp.277-285
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• 2004

In this paper, a 2 DOF haptic yawing joystick for use as the navigation input device in virtual environments is introduced. The haptic yawing joystick has 360° range for yawing motion and ±100° for pitching motion. The device can support weights of up to 26N for χ axis and 10N for axis with 10kHz of sampling rate. The size of the haptic yawing joystick is so small that it can be assembled on armrest of an arm chair and has relatively larger work space than other conventional 2 DOF joysticks. For the haptic yawing joystick, an ellipse navigation algorithm using the user's velocity in the virtual navigation is proposed. The ellipse represents the velocity of the user. According to the velocity of the navigator, the ellipse size is supposed to be changed. Since the path width of navigation environments is limited, the ellipse size is also limited. The ellipse navigation algorithm is tested in 2 dimensional virtual environments. The test results show that the average velocity of the navigation with the algorithm is faster than the average navigation velocity without the algorithm.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.32 no.3
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• pp.231-234
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• 2008

For the applications which need a micro-power supply such as thin and flat displays, micro-robot, and micro-system, it is especially necessary to integrate the passive components because they typically need more than 2/3 of the space of the conventional circuit. Therefore, we have designed and fabricated a novel piezoelectric micro transformer using the PZT thin film and MEMS technologies for application to the energy supply device of the micro-systems. The dimensions of the micro-transformer is $1000{\mu}m\;{\times}\;400{\mu}m\;{\times}\;4.8{\mu}m$ $(length{\times}width{\times}thickness)$. The dynamic displacement of around $9.2{\pm}0.064{\mu}m$ was observed at 10 V. The dynamic displacement varied almost linearly with applied voltage. The average voltage gain (step-up ratio) was approximately 2.13 at the resonant frequency $(F_r=8.006KHz)$ and load resistance $(R_L)$ of 1 $M{\Omega}$.

• Journal of the Semiconductor & Display Technology
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• v.8 no.1
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• pp.13-17
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• 2009

In PRAM applications, the devices can be made for both binary and multi-state storage. The ability to attain intermediate stages comes either from the fact that some chalcogenide materials can exist in configurations that range from completely amorphous to completely crystalline or from designing device structure such a way that mimics multiple phase chase phenomena in single cell. We have designed stack-structured phase change memory cell which operates as multi-state storage. Amorphous $Ge_xTe_{100-x}$ chalcogenide materials were stacked and a diffusion barrier was chosen for each stack layers. The device is operated by crystallizing each chalcogenide material as sequential manner from the bottom layer to the top layer. The amplitude of current pulse and the duration of pulse width was fixed and number of pulses were controlled to change overall resistance of the phase change memory cell. To optimize operational performance the thickness of each chalcogenide was controlled based on simulation results.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.421-424
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• 2004

As the deep sub-micron devices are recently integrated high package density, novel process method for sub $0.1{\mu}m$ devices is required to get the superior thin gate oxide characteristics and reliability. However, few have reported on the electrical quality and reliability on the thin gate oxide. In this paper I will recommand a novel shallow trench isolation structure for thin gate oxide $30{\AA}$ of deep sub-micron devices. Different from using normal LOCOS technology, novel shallow trench isolation have a unique 'inverse narrow channel effects' when the channel width of the devices is scaled down shallow trench isolation has less encroachment into the active device area. Based on the research, I could confirm the successful fabrication of shallow trench isolation(STI) structure by the SEM, in addition to thermally stable silicide process was achiever. I also obtained the decrease threshold voltage value of the channel edge and the contact resistance of $13.2[\Omega/cont.]$ at $0.3{\times}0.3{\mu}m^2$. The reliability was measured from dielectric breakdown time, shallow trench isolation structure had tile stable value of $25[%]{\sim}90[%]$ more than 55[sec].