• Korean Journal of Materials Research
• /
• v.20 no.1
• /
• pp.25-30
• /
• 2010

Si nanowire/multiwalled carbon nanotube nanocomposite arrays were synthesized. Vertically aligned Si nanowire arrays were fabricated by Ag nanodendrite-assisted wet chemical etching of n-type wafers using $HF/AgNO_3$ solution. The composite structure was synthesized by formation of a sheath of carbon multilayers on a Si nanowire template surface through a thermal CVD process under various conditions. The results of Raman spectroscopy, scanning electron microscopy, and high resolution transmission electron microcopy demonstrate that the obtained nanocomposite has a Si nanowire core/carbon nanotube shell structure. The remarkable feature of the proposed method is that the vertically aligned Si nanowire was encapsulated with a multiwalled carbon nanotube without metal catalysts, which is important for nanodevice fabrication. It can be expected that the introduction of Si nanowires into multiwalled carbon nanotubes may significantly alter their electronic and mechanical properties, and may even result in some unexpected material properties. The proposed method possesses great potential for fabricating other semiconductor/CNT nanocomposites.

• Biotechnology and Bioprocess Engineering:BBE
• /
• v.8 no.4
• /
• pp.240-245
• /
• 2003

The use of microfabricated microfluidic devices offers significant advantages over current technologies including fast analysis time and small reagent requirements. In the context of proteomic research, the possibility of using affinity-based separations for prefractionation of samples using microfluidic devices has significant potential. We demonstrate the use of microscale devices to achieve affinity separations of proteins using a device fabricated from borosilicate glass wafers. Photolithography and wet etching are used to pattern individual glass wafers and the wafers are fusion bonded at 650$^{\circ}C$ to obtain enclosed channels. A polymer has been successfully polymerized in situ and used either as a frit for packing beads or, when derivatized with Cibacron Blue 3GA, as a separation matrix. Both of these technologies are based on in situ UV photopolymerization of glycidyl methacrylate (GMA) and trimethylolpropane trimethacrylate (TRIM) in channels.

• Clean Technology
• /
• v.29 no.4
• /
• pp.255-261
• /
• 2023

Power semiconductors are semiconductors used for power conversion, transformation, distribution, and control. Recently, the global demand for high-voltage power semiconductors is increasing across various industrial fields, and optimization research on high-voltage IGBT components is urgently needed in these industries. For high-voltage IGBT development, setting the resistance value of the wafer and optimizing key unit processes are major variables in the electrical characteristics of the finished chip. Furthermore, the securing process and optimization of the technology to support high breakdown voltage is also important. Etching is a process of transferring the pattern of the mask circuit in the photolithography process to the wafer and removing unnecessary parts at the bottom of the photoresist film. Ion implantation is a process of injecting impurities along with thermal diffusion technology into the wafer substrate during the semiconductor manufacturing process. This process helps achieve a certain conductivity. In this study, dry etching and wet etching were controlled during field ring etching, which is an important process for forming a ring structure that supports the 3.3 kV breakdown voltage of IGBT, in order to analyze four conditions and form a stable body junction depth to secure the breakdown voltage. The field ring ion implantation process was optimized based on the TEG design by dividing it into four conditions. The wet etching 1-step method was advantageous in terms of process and work efficiency, and the ring pattern ion implantation conditions showed a doping concentration of 9.0E13 and an energy of 120 keV. The p-ion implantation conditions were optimized at a doping concentration of 6.5E13 and an energy of 80 keV, and the p+ ion implantation conditions were optimized at a doping concentration of 3.0E15 and an energy of 160 keV.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2008.11a
• /
• pp.418-418
• /
• 2008

The electrochemical etching of silicon in HF-based solutions is known to form various types of porous structures. Porous structures are generally classified into three categories according to pore sizes: micropore (below 2 nm in size), mesopore (2 ~ 50 nm), and macropore (above 50 nm). Recently, the formation of macropores has attracted increasing interest because of their promising characteristics for an wide scope of applications such as microelectromechanical systems (MEMS), chemical sensors, biotechnology, photonic crystals, and photovoltaic application. One of the promising applications of macropores is in the field of MEMS. Anisotropic etching is essential step for fabrication of MEMS. Conventional wet etching has advantages such as low processing cost and high throughput, but it is unsuitable to fabricate high-aspect-ratio structures with vertical sidewalls due to its inherent etching characteristics along certain crystal orientations. Reactive ion dry etching is another technique of anisotropic etching. This has excellent ability to fabricate high-aspect-ratio structures with vertical sidewalls and high accuracy. However, its high processing cost is one of the bottlenecks for widely successful commercialization of MEMS. In contrast, by using electrochemical etching method together with pre-patterning by lithographic step, regular macropore arrays with very high-aspect-ratio up to 250 can be obtained. The formed macropores have very smooth surface and side, unlike deep reactive ion etching where surfaces are damaged and wavy. Especially, to make vertical microwire or nanowire arrays (aspect ratio = over 1:100) on silicon wafer with top-down photolithography, it is very difficult to fabricate them with conventional dry etching. The electrochemical etching is the most proper candidate to do it. The pillar structures are demonstrated for n-type silicon and the formation mechanism is well explained, while such a experimental results are few for p-type silicon. In this report, In order to understand the roles played by the kinds of etching solution and mask patterns in the formation of microwire arrays, we have undertaken a systematic study of the solvent effects in mixtures of HF, dimethyl sulfoxide (DMSO), iso-propanol, and mixtures of HF with water on the structure formation on monocrystalline p-type silicon with a resistivity with 10 ~ 20 $\Omega{\cdot}cm$. The different morphological results are presented according to mask patterns and etching solutions.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.29 no.1
• /
• pp.30-34
• /
• 2016

In this paper, we report that selective etching on N-polar face by EC (electro-chemical)-etching effect on the reduction of bowing and strain of FS (free-standing)-GaN substrates. We applied the EC-etching to concave and convex type of FS-GaN substrates. After the EC-etching for FS-GaN, nano porous structure was formed on N-polar face of concave and convex type of FS-GaN. Consequently, the bowing in the convex type of FS-GaN substrate was decreased but the bowing in the concave type of FS-GaN substrate was increased. Furthermore, the FWHM (full width at half maximum) of (1 0 2) reflection for the convex type of FS-GaN was significantly decreased from 601 to 259 arcsec. In the case, we confirmed that the EC-etching method was very effective to reduce the bowing in the convex type of FS-GaN and the compressive stress in N-polar face of convex type of FS-GaN was fully released by Raman measurement.

• Journal of the Korean Vacuum Society
• /
• v.19 no.4
• /
• pp.314-318
• /
• 2010

We fabricated a plasma texturing for multi-crystalline silicon cells using reactive ion etching (RIE). Multi-crystalline Si cells have not benefited from the cost-effective wet-chemical texturing processes that reduce front surface reflectance on single-crystal wafers. Elimination of plasma damage has been achieved while keeping front reflectance to extremely low levels. We will discuss reflectance, quantum efficiency and conversion efficiency for multi-crystalline Si solar cell by each RIE process conditions.

• Korean Journal of Crystallography
• /
• v.14 no.2
• /
• pp.93-104
• /
• 2003

The crystals of group-Ⅲ nitride semiconductors with wurtzite structure exhibit a strong polarity. Especially, GaN has characteristics of different growth rate, anisotropic electrical and optical properties due to the polarity. In this work, GaN epilayer was grown and the polarities of the crystals were observed by the chemical wet etching and SP-EFM. GaN thin films were deposited on c-plane A1₂O₃ substrate under the variations of growth conditions by HVPE such as the deposition temperature of the buffer layer, the deposition time, the ratio of Group-V and Ⅲ and the deposition temperature of the film. The adquate results were obtained under the conditions of 500℃, 90 seconds, 1333 and 1080℃, respectively. It is observed that the GaN layer grown without the buffer layer has N-polarity and the GaN layer grown on the buffer layer has Ga-polarity. Fine crystal single particles were grown on c-plane A1₂O₃ and SiO₂, layer. The external shape of the crystal shows ｛10-11｝｛10-10｝(000-1) planes as expected in the PBC theory and anisotropic behavior along c-axis is obvious. As a result of etching on each plane, (000-1) and ｛10-11｝planes were etched strongly due to the N-polarity and ｛10-10｝ plane was not affected due to the non-polarity. In the case of the crystal grown on c-plane A1₂O₃, two types of crystals were grown. They were hexagonal pyramidal-shape with ｛10-11｝plane and hexagonal prism with basal plane. The latter might be grown by twin plane reentrant edge (TPRE) growth.

• Current Photovoltaic Research
• /
• v.2 no.3
• /
• pp.88-94
• /
• 2014

The structural, optical and electrical properties of sputter-deposited CIGS films were directly influenced by the sputtering process parameters such as substrate temperature, working pressure, RF power and distance between target and substrate. CIGS thin films deposited by using a quaternary target revealed to be Se deficient due to Se low vapor pressure. This Se deficiency affected the overall stoichiometry of the films, causing the films to be Cu-rich. Current tends to pass through the Cu-Se channels which act as the shunting path increasing the film conductivity. The crystal structure of CIGS thin films depends on the substrate orientation due to the influence of surface morphology, grain size and stress of Mo substrate. The excess of Cu was removed from the CIGS films by KCN treatment, achieving a suitable Cu concentration (referred as Cu-poor) for the fabrication of solar cell. Due to high Cu concentrations on the CIGS film surface induced by Cu-Se phases after CIGS film deposition, KCN treatment proved to be necessary for the fabrication of high efficiency solar cells. Also during KCN treatment, dislocation density and lattice parameter decreased as excess Cu was removed, resulting in increase of bandgap and the decrease of conductivity of CIGS films. It was revealed that Cu-Se secondary phase could be removed by KCN wet etching of CIGS films, allowing the fabrication of high efficiency absorber layer.

• Proceedings of the Materials Research Society of Korea Conference
• /
• 2012.05a
• /
• pp.88.1-88.1
• /
• 2012

Silicon nanowires (SiNWs), due to their unusual quantum-confinement effects that lead to superior electrical and optical properties compared to those of the bulk silicon, have been widely researched as a potential building block in a variety of novel electronic devices. The conventional means for the synthesis of SiNWs has been the vapor-liquid-solid method using chemical vapor deposition; however, this method is time consuming, environmentally unfriendly, and do not support vertical growth. As an alternate, the electroless etching method has been proposed, which uses metal catalysts contained in aqueous hydrofluoric acids (HF) for vertically etching the bulk silicon substrate. This new method can support large-area growth in a short time, and vertically aligned SiNWs with high aspect ratio can be readily synthesized with excellent reproducibility. Nonetheless, there still are rooms for improvement such as the poor surface characteristics that lead to degradation in electrical performance, and non-uniformity of the diameter and shapes of the synthesized SiNWs. Here, we report a facile method of SiNWs synthesis having uniform sizes, diameters, and shapes, which may be other than just cylindrical shapes using a modified nanosphere lithography technique. The diameters of the polystyrene nanospheres can be adjustable through varying the time of O2 plasma treatment, which serve as a mask template for metal deposition on a silicon substrate. After the removal of the nanospheres, SiNWs having the exact same shape as the mask are synthesized using wet etching technique in a solution of HF, hydrogen peroxide, and deionized water. Different electrical and optical characteristics were obtained according to the shapes and sizes of the SiNWs, which implies that they can serve specific purposes according to their types.

• Proceedings of the KIEE Conference
• /
• 2004.07c
• /
• pp.2105-2107
• /
• 2004

In this study, Spiral inductors on the $SiO_2$/Si(100) substrate were fabricated by the magnetron sputtering method. Cu thin film with the thickness of 2 ${\mu}m$ was deposited on the substrate. Also we fabricated square inductors through the wet chemical etching technique. The inductors are completely specified by the turn width and the spacing between spirals. Both the width and spacing between spirals were varied from 10 to 60 ${\mu}m$ and from 20 to 70 ${\mu}m$, respectively. Inductance and Q factor dependent on the RF frequency were investigated to analyze performance of inductor arrays. Also, We recommend that the reasonable Q-factors, spec's turns and thickness of the coil for inductors cab be set to be ideal condition.