• 조명전기설비학회논문지
• /
• 제21권9호
• /
• pp.101-108
• /
• 2007

State estimators are used to monitor the operating states of power systems in modern EMS. It iteratively calculates the voltage profile of the currently operating power system with voltage, current, and power measurements gathered from the entire system. All the measurements are usually assumed to be obtained simultaneously. It is practically impossible, however, to maintain the synchronism of the measurement data. Recently, phasor measurements synchronized via satellite are used for the operation of these power systems. This paper describes the modified state estimator used to support the processing of synchronized phasor measurements. Synchronized phasor measurements are found to provide synchronism of measurement data and improve the accuracy/redundancy of the measurement data for state estimation. The details of the developed state estimation program and some numerical results of operation are presented.

• Journal of Power Electronics
• /
• 제1권1호
• /
• pp.36-47
• /
• 2001

The carrier-based space vector pulse width modulation(SVPWM), which is considered as highly simple and efficient PWM technology, can be also used in multilevel inverters. The method was originally designed for the two-level inverter and developed to the diode clamped multilevel inverter structure. however it may be noted that it also cause bad switch utilization in cascaded multilevel inverter. This paper introduces an improved carrier-based SVPWM scheme, which is fully suitable for cascaded multilevel inverter topologies because it can achieve the optimized switch utilization through the redistribution of the triangular carrier waves considering leg voltage redundancies while having the advantages of the conventional carrier-based SVPWM. Using simulation and experimental results, the superior performance of new PWM method is shown.

• 대한전기학회논문지:전력기술부문A
• /
• 제55권9호
• /
• pp.359-364
• /
• 2006

In modern EMS, state estimation is used as a tool for monitoring how the power system operates. A state estimator iteratively calculates the voltage profile of the currently operating power system with voltage, current, and power measurements gathered from the entire system. It is usually assumed that all the measurements are obtained simultaneously. It, however, is not practically possible to maintain the synchronism of the measurements data. Recently, phasor measurements synchronized by satellites are used for the operation of the power systems. This paper describes the state estimator modified to support the processing of synchronized phasor measurements. Synchronized phasor measurements are found to provide synchronism of measurement data and improve the nccuracy/redundancy of the results of running it are presented.

• 전기전자학회논문지
• /
• 제23권4호
• /
• pp.1218-1223
• /
• 2019

HVDC 시스템에서 풀-브리지 서브 모듈 구조는 하프브리지 서브 모듈에 비해 부품 수가 증가하지만 100 % 여유율 확보가 가능하여 고장률을 크게 줄일 수 있다. 그러나 풀-브리지 서브 모듈은 여유율 보장과 암(arm) 단락 방지를 위한 데드 타임(dead-time)을 확보하기 위해 복잡한 제어 알고리즘이 필요하다. 이 문제를 해결하기 위해 풀-브리지 서브 모듈과 동일한 부품 수와 100 % 여유율을 갖는 병렬 하프브리지 구성의 고장률을 분석한다. 기존의 부품 고장 분석에 고장나무분석 방법을 적용하여 서브 모듈의 동작 위험을 반영함으로써 서브 모듈의 수명주기를 보다 정확하게 예측할 수 있다. 병렬 하프브리지 서브모듈의 타당성 검증을 위해 FTA 기반 분석 방법과 기존의 PCA 기반 방법으로 분석된 고장률을 비교한다.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2000년도 추계학술대회 논문집 학회본부 A
• /
• pp.139-141
• /
• 2000

High voltage direct current(HVDC) transmission system uses the phase controlled rectifier triggered by means of IPC(individual phase control) or EPC(equidistant pulse control). Most HVDC system has adopted EPC method that can solve the harmonic instability problem of IPC method in weak power system. But EPC has inherent indirect synchronizing problem requiring the closed loop control. This paper presents the new gate pulse generating method for 12-pulse HVDC converter, which combines IPC with EPC. Simulation and test results are presented. The basic concept is that it generates the gating pulse for 12-pulse converter by synthesizing the internal phase reference using the frequency and phase information of a sin91e phase voltage. To ensure the reliability of the external phase input, Potential transformer that detects the phase voltage has redundancy. Using fault detecting algorithm the healthy input is always guaranteed. And the frequency compensation function was reinforced.

• 전력전자학회논문지
• /
• 제17권3호
• /
• pp.266-273
• /
• 2012

In this paper, the new open fault detection and tolerant operation method for 3 phase PWM rectifier is proposed. When open fault occurred on the inverter switches of 3 Phase PWM rectifier, the DC link voltage ripple is increased because the input current of the faulty phase is distorted. In this case, the quality of electric power would decrease, and the life time of DC link capacitor is decreased. The open fault is detected by a simple MRAS(Model Reference Adaptive System) without additional hardware sensors, and the tolerant operation carried out by turning on the opposite switch of the faulty switch without any redundancy. By the proposed method, the faulty phase input current can be controlled, so that 3-phase input current is balanced relatively under the faulty condition and the voltage ripple of DC link output is reduced. The validity of the proposed technique is proved on the 6kW 3-phase PWM rectifier system by simulation and experiment.

• Molecules and Cells
• /
• 제39권9호
• /
• pp.705-713
• /
• 2016

The efficiency of Agrobacterium-mediated transformation in plants depends on the virulence of Agrobacterium strains, the plant tissue culture conditions, and the susceptibility of host plants. Understanding the molecular interactions between Agrobacterium and host plant cells is crucial when manipulating the susceptibility of recalcitrant crop plants and protecting orchard trees from crown gall disease. It was discovered that Arabidopsis voltage-dependent anion channel 1 (atvdac1) mutant has drastic effects on Agrobacterium-mediated tumorigenesis and growth developmental phenotypes, and that these effects are dependent on a Ws-0 genetic background. Genetic complementation of Arabidopsis vdac1 mutants and yeast porin1-deficient strain with members of the AtVDAC gene family revealed that AtVDAC1 is required for Agrobacterium-mediated transformation, and there is weak functional redundancy between AtVDAC1 and AtVDAC3, which is independent of porin activity. Furthermore, atvdac1 mutants were deficient in transient and stable transformation by Agrobacterium, suggesting that AtVDAC1 is involved in the early stages of Agrobacterium infection prior to transferred-DNA (T-DNA) integration. Transgenic plants overexpressing AtVDAC1 not only complemented the phenotypes of the atvdac1 mutant, but also showed high efficiency of transient T-DNA gene expression; however, the efficiency of stable transformation was not affected. Moreover, the effect of phytohormone treatment on competence to Agrobacterium was compromised in atvdac1 mutants. These data indicate that AtVDAC1 regulates the competence of Arabidopsis to Agrobacterium infection.

• 전력전자학회논문지
• /
• 제10권1호
• /
• pp.61-69
• /
• 2005

NPC 인버터는 많은 수의 전력용 반도체 소자로 구성되어 있으므로 다른 고장의 유형보다 전력용 반도체 스위치의 고장 발생 가능성이 더욱 크다. 고장발생시에 시스템의 연속적인 운전을 위한 대책의 개발은 매우 필요하며, 이러한 고장은 제안된 방법을 이용함으로써 시스템의 고장 허용 능력을 향상할 수 있다. 제안된 방법은 하나의 전력용 반도체 고장발생시 고장난 전력용 반도체가 포함된 고장상을 직렬 연결된 커패시터의 접속점에 연결한 후 나머지 두상을 이용하여 제어함으로써 직류-링크 전압을 유지하고, 일정한 크기를 가지는 출력 부하상전류를 연속적으로 시스템에 공급할 수 있다. 제안된 방법은 몇가지 특별한 분야에서 값비싼 다른 대안책들보다 더 경제적인 대안이다.

• 한국정보전자통신기술학회논문지
• /
• 제6권3호
• /
• pp.135-140
• /
• 2013

본 논문은 스마트 그리드의 핵심 설비중 하나인 반도체 지능형 변압기의 시스템 구성과 이에 필요한 PWM 컨버터의 PWM 생성 방식에 관한 논문으로, 반도체 지능형 변압기의 경우 입력단이 수전계통에 직접 접속되기 때문에 고전압을 견딜 수 있는 방식으로 구성되어야 하고 이를 위해서는 다단 연결방식의 PWM 컨버터의 구성이 필수적이다. 종래의 PWM 생성 방식의 경우 지령전압의 크기에 따라서 각 단별 스위칭 부하가 균등하게 분포되지 않기 때문에 이를 해결하기 위한 복잡한 리던던시를 스위칭 패턴에 추가해야 했으나, 본 논문에서 제안하는 방식의 경우 부하의 분담이 자동적으로 이루어지기 때문에 그러한 부담없이 시스템을 구성하는 것이 가능하다.

• Journal of Power Electronics
• /
• 제14권6호
• /
• pp.1272-1280
• /
• 2014

This paper presents solutions for fault detection and diagnosis of two-level, three phase voltage-source inverter (VSI) topologies with IGBT devices. The proposed solutions combine redundant standby VSI structures and contactors (or relays) to improve the fault-tolerant capabilities of power electronics in applications with safety requirements. The suitable combination of these elements gives the inverter the ability to maintain energy processing in the occurrence of several failure modes, including short-circuit in IGBT devices, thus extending its reliability and availability. A survey of previously developed fault-tolerant VSI structures and several aspects of failure modes, detection and isolation mechanisms within VSI is first discussed. Hardware solutions for the protection of power semiconductors with fault detection and diagnosis mechanisms are then proposed to provide conditions to isolate and replace damaged power devices (or branches) in real time. Experimental results from a prototype are included to validate the proposed solutions.