• 제목/요약/키워드: voltage divider

검색결과 142건 처리시간 0.03초

펄스형 고전압 측정용 용량성 분압기 (Capacitive Voltage Divide for a Pulsed High-Voltage Measurement)

  • 장성덕;손윤규;권세진;오종석;조무현
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제54권2호
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    • pp.63-68
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    • 2005
  • Total 12 units of high power klystron-modulator systems as microwave source are under operation for 2.5 GeV electron linear accelerator in Pohang Light Source (PLS) linac. The klystron-modulator system has an important role for the stable operation to improve an availability statistics of overall system performance of klystron-modulator system. RF power and beam power of klystron are precisely measured for the effective control of electron beam. A precise measurement and measurement equipment with good response characteristics are demanded for this. Input power of klystron is calculated from the applied voltage and the current on its cathode. Tiny measurement error severely effects RF output power value of klystron. Therefore, special care is needed to measure precise beam voltage. Capacitive voltage divider (CVD), which divides input voltage as capacitance ratio, is intended for the measurement of a beam voltage of 400 kV generated from the klystron-modulator system. Main parameter to determine standard capacitance in the high arm of CVD is dielectric constant of insulation oil. Therefore CVD should be designed to have a minimum capacitance variation due to voltage, frequency and temperature in the measurement range. This paper will be present and discuss the design concept and analysis of capacitive voltage divider for a pulsed high-voltage measurement, and the empirical relations between capacitance effects and oil temperature variation.

시험소 충격전압 측정시스템의 소급성검토 (Review of the tracebility of impulse voltage measuring system in test laboratory)

  • 허종철;최익순;정주영;반석걸;박정후
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 하계학술대회 논문집 C
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    • pp.1632-1634
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    • 2003
  • For lihgtning and switching impulse voltage performances in laboratories, impulse voltage measuring system, which is consisted of voltage divider, recording instrument and connecting system between divider and recording instrument, is used. In order to show reliability of test result in test laboratory, tracebility of these measuring system to be using in test laboratory is needed. In this paper, we describe tracebility and uncertainty of impulse voltage measuring system in test laboratory.

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대전력 시험전압 측정방법에 대한 고찰 (The study of test voltage measuring system for high-power testing laboratory)

  • 노창일;나대열;김선구;정흥수;김원만;이동준
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2005년도 제36회 하계학술대회 논문집 B
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    • pp.1038-1040
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    • 2005
  • This paper describes the optimal design, construction and performance evaluation of voltage divider used in high power testing laboratory for voltage measuring system. These dividers, which are of R, C, R&C type voltage dividers, the voltage to be measured range from voltage to several ten kilovolts, the frequency of the signals has a bandwidth from DC to megaHertz Measuring transient voltage and currents in the high voltage power laboratory is generally accompanied by electromagnetic interface and induced noise. above all, the measuring capabilities of voltage measuring system are dependent upon short response time and it must be as free as possible of inductive effects. In this paper presents both characteristic of voltage divider and design of voltage measuring system.

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가변 분배 비율 비대칭 전력 분배기 (An Unequal Power Divider with Adjustable Dividing Ratio)

  • 임종식;오성민;구재진;정용채;안달
    • 한국전자파학회논문지
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    • 제18권5호
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    • pp.478-485
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    • 2007
  • 본 논문에서는 분배 비율을 조절할 수 있는 1:N 비대칭 월킨슨 전력 분배기를 제안한다. 제안된 비대칭 전력분배기는 월킨슨 구조에 기인하고 있다. 제안한 분배기는 사각형 형태의 결함 접지 구조와 결함 접지 구조 안에 위치한 격리 패턴 구조, 그리고 바이어스 전압에 따라 캐패시턴스가 변하는 버랙터 다이오드를 지니고 있다. 결함 접지 구조를 지니는 마이크로스트립 전송 선로의 특성 임피던스는 버랙터 다이오드에 인가된 전압에 따라서 값이 변화하고, 이로 인하여 비대칭 전력 분배 비율도 변한다. 측정에서 얻은 비대칭 전력 분배 비율(N)은 $2.59{\sim}10.4$로써 매우 다양한 전력 분배 비율을 보여준다.

A 90-nm CMOS 144 GHz Injection Locked Frequency Divider with Inductive Feedback

  • Seo, Hyo-Gi;Seo, Seung-Woo;Yun, Jong-Won;Rieh, Jae-Sung
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제11권3호
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    • pp.190-197
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    • 2011
  • This paper presents a 144 GHz divide-by-2 injection locked frequency divider (ILFD) with inductive feedback developed in a commercial 90-nm Si RFCMOS technology. It was demonstrated that division-by-2 operation is achieved with input power down to -12 dBm, with measured locking range of 0.96 GHz (144.18 - 145.14 GHz) at input power of -3 dBm. To the authors' best knowledge, this is the highest operation frequency for ILFD based on a 90-nm CMOS technology. From supply voltage of 1.8 V, the circuit draws 5.7 mA including both core and buffer. The fabricated chip occupies 0.54 mm ${\times}$ 0.69 mm including the DC and RF pads.

5.8GHz 마이크로파 스마트폰 충전을 위한 수신기의 효율측정 (Efficiency Measurement of a Receiver for 5.8GHz Microwave Smartphone Charging)

  • 이성훈;손명식
    • 반도체디스플레이기술학회지
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    • 제15권4호
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    • pp.22-26
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    • 2016
  • In this paper, we measured the efficiency of the receiver for 5.8GHz Microwave Smartphone Charging. We have designed and fabricated 1W and 2W power amplifier, respectively. A 1W power amplifier used a TC3531 power device of TRANSCOM Inc. In addition, a 2W power amplifier using the two TC3531 devices was constructed with divider and combiner. We used the Wilkinson divider theory for divider and combiner. The voltage was measured using the 1W and 2W power amplifier and integrated receivers to the distance of 50cm.

새로운 구조의 프로그램어블 주파수 분주기를 사용한 주파수 합성기 설계 (Design of Frequency Synthesizer using Novel Architecture Programmable Frequency Divider)

  • 김태엽;박수양;손상희
    • 한국통신학회논문지
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    • 제27권5C호
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    • pp.500-505
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    • 2002
  • 본 논문에서는 50%의 duty cycle 출력을 가지며, 디지털 방식으로 분주수를 제어할 수 있는 새로운 분주기 구조를 제안하였다. 그리고 0.25$\mu\textrm{m}$ 2-poly, 5-metal CMOS 공정 파라미터를 이용한 HSPICE 모의실험을 통해서 제안한 주파수 분주기를 이용한 900MHz 주파수 합성기를 설계하였다. 제안한 주파수 분주기의 동작은 0.65$\mu\textrm{m}$ 2-poly, 2-metal CMOS 공정을 사용하여 제작한 칩을 측정하여 확인하였다. 설계한 전압제어발진기(VCO)는 2.5V 전원전압 하에서 900MHz의 중간주파수, $\pm$10%의 동작 범위, 154MHz/V의 이득을 가진다. 또한 모의실험 결과 주파수 합성기의 settling time은 약 $1.5\mu\textrm{s}$이고, 짝수와 홀수 분주시 50%의 duty cycle과 820MHz~1GHz의 동작 주파수 범위를 갖으며, 전력소모는 대략 70mW임을 확인하였다.

A Parallel Coupled QVCO and Differential Injection-Locked Frequency Divider in 0.13 μm CMOS

  • Park, Bong-Hyuk;Lee, Kwang-Chun
    • Journal of electromagnetic engineering and science
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    • 제10권1호
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    • pp.35-38
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    • 2010
  • A fully integrated parallel-coupled 6-GHz quadrature voltage-controlled oscillator (QVCO) has been designed. The symmetrical parallel-coupled quadrature VCO is implemented using 0.13-${\mu}m$ CMOS process. The measured phase noise is -101.05 dBc/Hz at an offset frequency of 1 MHz. The tuning range of 710 MHz is achieved with a control voltage ranging from 0.3 to 1.4 V. The average output phase error is about $1.26^{\circ}$ including cables and connectors. The QVCO dissipates 10 mA including buffer from the 1.5 V supply voltage. The output characteristic of the differential injection-locked frequency divider (DILFD), which has similar topology to the QVCO, is presented.

Field terminator를 이용한 CMA 제작에 관한 연구 (The Study on CMA using field terminator)

  • 이충만;성면창;권순남;정광호
    • 한국진공학회지
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    • 제5권4호
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    • pp.278-283
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    • 1996
  • Field terminator를 이용하여 singl path cylindrical mirror analyser를 제작하였다. 먼저 컴퓨터 모의실험을 바탕으로 CMA의 원통형 전극양단에서 fringing field effect를 최소로 하여 log-scale의 등전위면을 그대로 유지하는 terminator의 전압비와 위치 등을 구하였다. 계산된 전압을 직렬로 연결된 금속산화물저항으로 만든 voltage divider로 field terminator에 직접 인가하여 CMA의 fringing field effect를 줄이는 방법으로 개발하였다. 이 방법으로 제작된 CMA의 분해능이 $\Delta$E/E=0.4% 이상임을 확인하였다.

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