• Title/Summary/Keyword: voltage difference

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Ozone Generation Synergy Effects of Three-Phase Voltage Apply Type Superposed Discharge Ozonizer (3상 전압인가형 중첩방전 오존발생기의 오존생성 상승효과)

  • Lee, Byeong-Jun;Lee, Sang-Geun;Song, Hyeon-Jik;Kim, Yeong-Hun;Park, Won-Ju;Lee, Gwang-Sik
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.49 no.8
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    • pp.468-476
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    • 2000
  • Nowadays, ozone is mainly utilized for water treatment and home equipments. Although the demand for ozone is increasing, the ozone yield of silent discharge type ozonizer is low. Therefore, it is expected to improve the energy efficiency and ozone yield of an ozonizer. In this paper, a new ozone generation system is proposed. The 60[Hz] three-phase voltage is applied to three-phase superposed discharge type ozonizer(3PSDO) which has three electrodes(central, internal and external electrodes). There is no discharge pause time when three-phase voltage is applied due to 120-degree phase difference of applied voltage. The synergy effect of the three-phase superposed discharge type ozonizer is investigated by comparing with the three sort of single-phase discharge type ozonizer(1PDO). So, three-phase superposed discharge type ozonizer is able to obtain high ozone yield, and optimize discharge space, because this can increase the discharge power at low applied voltage.

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A Study on the Multi-carrier PWM Methods for Voltage Balancing of Flying Capacitor in the Flying Capacitor Multi-level Inverter (플라잉 커패시터 멀티레벨 인버터의 플라잉 커패시터 전압 균형을 위한 멀리 캐리어 PWM 기법에 대한 연구)

  • Jin, Bum-Seung;Kim, Tae-Jin;Kang, Dae-Wook;Hyun, Dong-Seok
    • Proceedings of the KIPE Conference
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    • 2005.07a
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    • pp.298-301
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    • 2005
  • The flying capacitor voltage control of the flying capacitor multi-level inverter (FCMLI) is very important for safe operation. The voltage unbalancing of flying capacitors caused serious problems in safety and reliability of system. In the FCMLI, balancing problem of the flying capacitor has its applications limited. The voltage unbalance is occurred by the difference of each capacitors charging and discharging time applied to FCMLI. This paper investigates and analyzes multi-carrier PWM methods to solve capacitor voltage balancing problem. The Phase-Shift PWM (PSPWM) method that is commonly used, The Modified Carrier-Redistribution PWM (MCRPWM) method and The Saw-Tooth-Rotation PWM (STRPWM) method are discussed and compared with respect to switching state, balancing voltage of capacitors and output waveform. These three PWM methods are analyzed by using a flying capacitor three-level inverter and provided result through simulation. Finally, the harmonics about the output voltages of their methods are compared using the harmonic distortion factor (HDF).

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Properties of Electrostatic Electrification Degradation due to Contaminant Difference of Silicone Rubbers (오손액 변화에 따른 실리콘 고무의 정전기 대전열화 특성)

  • Lee, Sung Ill
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.28 no.9
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    • pp.587-592
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    • 2015
  • In this study, the electrification voltage of electrostatics for silicone rubber sample($4cm{\times}4cm{\times}0.103cm$) following immersion with contaminants of 2 ml, 5 ml, 10 ml for six hours has been measured in through the applied voltage of 10 kV DC at temperature of $80^{\circ}C{\sim}110^{\circ}C$, humidity of 50%~90%. The results of this study are as follows. In case the contaminants is constant, it found that the electrification voltage of electrostatic decreased with increasing temperature and humidity to $35^{\circ}C$, 90%. In case of 2 ml of contaminants concentration, it found that the electrification voltage of electrostatic decreased with increasing temperature and humidity to $35^{\circ}C$, 50%. In case of the sample at temperature of $15^{\circ}C$ and humidity of 50%, it found that the electrification voltage of electrostatic decreased with increasing contaminants to 10 ml.

Common-mode Voltage Reduction for Inverters Connected in Parallel Using an MPC Method with Subdivided Voltage Vectors

  • Park, Joon Young;Sin, Jiook;Bak, Yeongsu;Park, Sung-Min;Lee, Kyo-Beum
    • Journal of Electrical Engineering and Technology
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    • v.13 no.3
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    • pp.1212-1222
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    • 2018
  • This paper presents a model predictive control (MPC) method to reduce the common-mode voltage (CMV) for inverters connected in parallel, which increase the capacity of energy storage systems (ESSs). The proposed method is based on subdivided voltage vectors, and the resulting algorithm can be applied to control the inverters. Furthermore, we use more voltage vectors than the conventional MPC algorithm; consequently, the quality of grid currents is improved. Several methods were proposed in order to reduce the CMV appearing during operation and its adverse effects. However, those methods have shown to increase the total harmonic distortion of the grid currents. Our method, however, aims to both avoid this drawback and effectively reduce the CMV. By employing phase difference in the carrier signals to control each inverter, we successfully reduced the CMV for inverters connected in parallel, thus outperforming similar methods. In fact, the validity of the proposed method was verified by simulations and experimental results.

The Steady State Characteristics of the Push-Pull Current-fed DC-to-DC Converter with Multiple Outputs (다출력 전류환류형 DC-CD 컨버터의 정상특성)

  • 김희준
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.5
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    • pp.536-541
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    • 1988
  • The push-pull current-fed DC-to-DC converter has only one energy storage reactor in series with the input for any number of outputs. It is considered that this property of the converter has considerable advantages over other multiple-output circuits. The steady state characteristics of the converter with two outputs is analyzed. It is known that the voltage difference between the two outputs appears by existing the 2nd winding resistance of transformer and there is a region of the duty ratio in which the voltage difference of the converter is smaller than that of the forward converter.

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A CMOS integrated circuit design of charge-sharing scheme for a capacitive fingerprint sensor (용량형 지문인식센서를 위한 전하분할 방식 감지회로의 CMOS 구현)

  • Nam, Jin-Moon;Lee, Moon-Key
    • Journal of Sensor Science and Technology
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    • v.14 no.1
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    • pp.28-32
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    • 2005
  • In this paper, a CMOS integrated detection circuit for capacitive type fingerprint sensor signal processing is described. We designed a detection circuit of charge-sharing sensing scheme. The proposed detection circuit increases the voltage difference between a ridge and valley. The test chip is composed of $160{\times}192$ array sensing cells (12 by $12.7{\;}mm^{2}$). The chip was fabricated on a 0.35 m standard CMOS process. Measured difference voltage between a ridge and valley was 0.95 V.

A Study of Thermoelectric Effect in Resistance Spot Welding of Aluminium Alloy (알루미늄 합금의 저항점용접에서의 열전 효과에 대한 연구)

  • ;K. T. Rie
    • Transactions of the Korean Society of Automotive Engineers
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    • v.6 no.5
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    • pp.10-19
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    • 1998
  • The erosion of electrode in spot welding of aluminium alloy by direct current is dependent on the electric polarity. The positive electrode is much more eroded than the negative one. To explain this phenomenon, Peltier effect has been generally accepted as a unique theory. In this study Peltier effect was evaluated by calculations on the basis of some references and experiments. The difference of heat generated by Peltier effect on both electrode surfaces was, however, only 4% of total heat generated during wel- ding. Because of insufficient explanation, Kohler theory, which is mainly affected by thin oxide film, was introduced. A theoretical calculation showed 17% of the temperature difference between the positive and negative electrode, in case "surface voltage" resulted from oxide film was 30% of total contact voltage. This revealed that the erosion of electrode could be more affected by Kohler theory than effect.an effect.

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Design of Low Power Capacitive Sensing Circuit with a High Resolution in CMOS Technology

  • Jung, Seung-Min
    • Journal of information and communication convergence engineering
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    • v.9 no.3
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    • pp.301-304
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    • 2011
  • This paper describes the possibility of a low-power, high-resolution fingerprint sensor chip. A modified capacitive detection circuit of charge sharing scheme is proposed, which reduces the static power dissipation and increases the voltage difference between a ridge and valley more than conventional circuit. The detection circuit is designed and simulated in 3.3V, 0.35${\mu}$m standard CMOS process, 40MHz condition. The result shows about 27% power dissipation reduction and 90% improvement of difference between a ridge and valley sensing voltage. The proposed circuit is more stable and effective than a typical circuit.

Analysis on the Analog Filter Design and the Effect of Load for BLDCM Sensorless Drive (브러시리스 직류 전동기의 센서리스 구동시 부하 변동에 따른 회전자 위치 오차 분석과 아날로그 필터의 설계)

  • Kim Young-il;Kim Jong-Sun;Jang Jae-Hoon;Yoo Ji-Yoon;Kim Dong-Sik
    • Proceedings of the KIPE Conference
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    • 2004.07b
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    • pp.660-664
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    • 2004
  • The indirect rotor position detection method using terminal voltage of brushless DC motor (BLDCM) requires simple control circuit, and has wide speed range of sensorless operation. However, because the substantial phase difference exists between real back emf and terminal voltage, the existing indirect detection method using analog filter which is affected by frequency, speed, and load sensitively cannot be synchronized with current, in the end, it advances or delays. This paper presents new analog filter circuit design for rotor position estimation in order to solve the problem, and proposes novel sensorless operation method which is stable even in high speed range and not influenced by parameters with analysis on phase difference by load and speed. Moreover, the appropriateness of the proposed sensorless drive in this paper is verified and analyzed by experimentation.

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Capacitive Sensing Circuit for Low Power and High Resolution

  • Jung, Seung-Min;Yeo, Hyeop-Goo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.05a
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    • pp.692-695
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    • 2011
  • This paper describes the possibility of a low-power, high-resolution fingerprint sensor chip. A modified capacitive detection circuit of charge sharing scheme is proposed, which reduces the static power dissipation and increases the voltage difference between a ridge and valley more than conventional circuit. The detection circuit is designed and simulated in 3.3V, $0.35{\mu}m$ standard CMOS process, 40MHz condition. The result shows about 35% power dissipation reduction and 90% improvement of difference between a ridge and valley sensing voltage. The proposed circuit is more stable and effective than a typical circuit.

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