• Title/Summary/Keyword: very low bit rate

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Parallel Implementation of the Recursive Least Square for Hyperspectral Image Compression on GPUs

  • Li, Changguo
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.11 no.7
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    • pp.3543-3557
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    • 2017
  • Compression is a very important technique for remotely sensed hyperspectral images. The lossless compression based on the recursive least square (RLS), which eliminates hyperspectral images' redundancy using both spatial and spectral correlations, is an extremely powerful tool for this purpose, but the relatively high computational complexity limits its application to time-critical scenarios. In order to improve the computational efficiency of the algorithm, we optimize its serial version and develop a new parallel implementation on graphics processing units (GPUs). Namely, an optimized recursive least square based on optimal number of prediction bands is introduced firstly. Then we use this approach as a case study to illustrate the advantages and potential challenges of applying GPU parallel optimization principles to the considered problem. The proposed parallel method properly exploits the low-level architecture of GPUs and has been carried out using the compute unified device architecture (CUDA). The GPU parallel implementation is compared with the serial implementation on CPU. Experimental results indicate remarkable acceleration factors and real-time performance, while retaining exactly the same bit rate with regard to the serial version of the compressor.

A FAST INTRA PREDICTION MODE SELECTION METHOD IN H.264/AVC SCALABLE VIDEO CODING

  • Park, Sung-Jae;Lee, Yeo-Song;Sohn, Chae-Bong;Jeong, S.Y.;Chung, Kwang-Sue;Park, Ho-Chong;Ahn, Chang-Bum;Oh, Seoung-Jun
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2009.01a
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    • pp.170-173
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    • 2009
  • In this paper, we propose a fast intra prediction mode selection method in Scalable Video Coding(SVC) which is an emerging video coding standard as an extension of H.264/Advanced Video Coding(H.264/AVC). The proposed method decides a candidate intra prediction mode based on the characteristic of macroblock smoothness. Statistical analysis is applied to computing that smoothness in spatial enhancement layer. We also propose an early termination scheme for Intra_BL mode decision where the RD cost value of Intra_BL is utilized. Compared with JSVM software, our scheme can reduce about 55% of the computation complexity of intra prediction on average, while the performance degradation is negligible; For low QP values, the average PSNR loss is very negligible, equivalently the bit rate increases by 0.01%. For high QP values, the average PSNR loss is less than 0.01dB, which equals to 0.25% increase in bitrate on average.

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A Block Based Temporal Segmentation Algorithm for Motion Pictures (동영상의 시간적 블록기반 영상분할 알고리즘)

  • Lee, Jae-Do;Park, Jun-Ho;Jeon, Dae-Seong;Yun, Yeong-U;Kim, Sang-Gon
    • The Transactions of the Korea Information Processing Society
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    • v.7 no.5
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    • pp.1587-1598
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    • 2000
  • For the object-based video compression at very low bit rate, vieo segmentation is an essential part. In this paper, we propose a temporal video segmentation algorithms for motion pictures which is based on blocks. The algorithm is composed of three steps: (1) the change-detection, (2) the block merging, and (3) the block segmentation. The first step separates the change-detected region from background. Here, a new method for removing the uncovered region without motion estimation is presented. The second step, which is further divided into three substeps, estimates motions for the change-detected region and merges blocks with similar motions. The merging conditions for each substep as criteria are also given. The final step, the block segmentation, segments the boundary block that is excluded from the second step on a pixel basis. After describing our algorithm in detail, several experimental results along the processing order are shown step by step. The results demonstrate that the proposed algorithm removes the uncovered region effectively and produced objects that are segmented well.

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FRACTAL CODING OF VIDEO SEQUENCE USING CPM AND NCIM

  • Kim, Chang-Su;Kim, Rin-Chul;Lee, Sang-Uk
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 1996.06b
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    • pp.72-76
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    • 1996
  • We propose a novel algorithm for fractal video sequence coding, based on the circular prediction mapping (CPM), in which each range block is approximated by a domain block in the circularly previous frame. In our approach, the size of the domain block is set to be same as that of the range block for exploiting the high temporal correlation between the adjacent frames, while most other fractal coders use the domain block larger than the range block. Therefore the domain-range mapping in the CPM is similar to the block matching algorithm in the motion compensation techniques, and the advantages of this similarity are discussed. Also we show that the CPM can be combined with non-contractive inter-frame mapping (NCIM), improving the performance of the fractal sequence coder further. The computer simulation results on real image sequences demonstrate that the proposed algorithm provides very promising performance at low bit-rate, ranging from 40 Kbps to 250 Kbps.

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Motion Compensation by Affine Transform using Polygonal Matching Algorithm (다각형 정합 알고리듬을 이용한 affine 변환 움직임 보상)

  • Park, Hyo-Seok;Hwang, Chan-Sik
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.36S no.1
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    • pp.60-69
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    • 1999
  • Motion compensation by affine transform has been proposed as a solution to the artifact problems in very low bit rate video coding and a HMA(Hexagoanl Matching Algorithm) has been proposed for refine motions estimation. When dividing images with an affine transform, as image objects do not necessarily conform to triangle patterns. In this paper we propose a method that first divides an image into triangular patches according to its edge information and then further divides the image into more detailed triangular patches where more complicated edge information occurs. We image propose a PMA(Polygona Matching Algorithm) for refine motion estimation because of the different triangle pattern types of neighboring blocks and its performance is compared with H.263.

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Joint Carrier and Symbol Timing Recovery Using Repetitive Preamble (반복적인 프리엠블을 이용한 반송파 및 심볼 타이밍 동시 복원)

  • 오성근;황병대
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.8B
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    • pp.1436-1444
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    • 2000
  • In this paper, we propose the joint carrier and symbol timing recovery algorithm using repetitive preamble and differential detection for burst modem. The proposed algorithm can estimate the frequency offset and the symbol timing error regardless of the amount of frequency offset, with a high accuracy, even using very short preamble and at low SNR values. The algorithms for continuous phase frequency shift keying (CPFSK) and phase shift keying (PSK) types are developed. Through computer simulations, we compare the proposed algorithm with the existing algorithms on the estimation accuracy in terms of the preamble length, and analyze those bit error rate(BER) performance.

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Simple Blind Channel Estimation Scheme for Downlink MC-CDMA Systems (하향링크 MC-CMDMA 시스템을 위한 간단한 미상 채널 추정 방법)

  • Seo, Bang-Won
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.37 no.6A
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    • pp.480-487
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    • 2012
  • In multicarrier code-division multiple access (MC-CDMA) systems, conventional blind channel estimation schemes require the inverse matrix calculation or eigenvalue decomposition of the received signal covariance matrix. Therefore, computational complexity of the conventional schemes is too high and they cannot be employed in downlink systems. In this paper, we propose a simple blind channel estimation scheme with very low computational complexity. Simulation results show that the proposed scheme has better channel estimation and bit error rate (BER) performance than the conventional schemes.

Design and Performance Evaluation of Multilevel LDPC Codes (다중 레벨 LDPC 부호의 설계 및 성능 분석)

  • ;Yu Yi;Jia Hou
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.15 no.1
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    • pp.51-59
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    • 2004
  • We design multilevel coding(MLC) with a semi bit-interleaved coded modulation(BICM) scheme based on low density parity check(LDPC) codes. Different from traditional designs, we joint the MLC and BICM together by using the Gray mapping, which can transmit the multimedia data over several equivalent channels with different code rates. To get a good performance from signal-to-noise ratio(SNR) very close to the capacity of the additive white Gaussian noise(AWGN) channel, random regular LDPC code and a simple semi-algebra LDPC(SA-LDPC) code are discussed in MLC with parallel independent decoding(PID). Finally, the numerical results demonstrate that the proposed scheme could achieve both power and bandwidth efficiency for multimedia communication system.

An Efficient Compression Algorithm for Simple Computer Cell Animation (단순 컴퓨터 셀 애니메이션 영상에 효율적인 압축 알고리듬)

  • 민병석;정제창;최병욱
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.3A
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    • pp.211-220
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    • 2002
  • In this paper, we propose an efficient algorithm to compress simple computer cell animation at very low bit rate. The structure of proposed algorithm consists of intra frame coding and inter frame coding. In inter frame coding, animation is encoded by color quantization using a palette, rearrangement of index, ADPCM used in JPEG-LS, mapping, classification, and entropy coding. In interframe coding, classifying the characteristics of motion, animation is encoded by block based motion replenishment. Experimental results show that the proposed methods turns out to outperform conventional methods including Flash, FLC, Motion-JPEG, MPEG-1, and MPEG-4.

A Study on the Design of PLL for Improving of Characteristics of Locking Time and Jitter (Locking Time과 Jitter 특성의 개선을 위한 PLL 설계에 관한 연구)

  • Park, Jae-Boum;Park, Yun-Sik;Kim, Hwa-Young;Sung, Man-Young
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07b
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    • pp.1188-1191
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    • 2003
  • In this paper, we focus our attention on the improvement of locking time and jitter parameter and propose the new structure of PLL which combined with the FVC, FOVI Matcher(FVC-Output and VCO-input Matching Circuit), Control Circuit and the conventional charge pump PLL. Using fast operation characteristics of the FVC, the circuit matching FVC-Output and VCO-input (FOVI Matcher) made to synchronize very fast. Fast locking time is usually required for application where the PLL has to settle rapidly if they switch from an idle mode to a normal mode and to track high-frequency data bit rate in data recovery systems. After a fast acqusition is achieved by the using the FVC, the conventional PLL operates for removing the phase error between the reference signal and the feedback signal. Therefore this structure can improve the trade-off between acquisition behavior and locked behavior.

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