• Proceedings of the Korea Information Processing Society Conference
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• 2001.10a
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• pp.685-688
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• 2001

고속 I/O 를 갖는 Loosely coupled 다중 프로세서 시스템은 데이터의 처리 성능 향상과 I/O 집중화에 따른 병목 현상을 줄여줄 수 있다. 이 때 프로세서간의 데이터 전송에 사용되는 공유메모리는 그 구성과 이용 방법에 따라 시스템의 성능에 많은 영향을 미친다. 본 연구에서는 공유메모리의 사용 방법을 비동기, 메일박스를 통한 인터럽트 전달 인지 방식으로, I/O 사용방법을 고속 이더넷(IEEE 802.3u)으로 한 시스템 모델에서 다중 프로세서 시스템 구성에 필요한 공유메모리의 최적 사용량을 입출력 데이터의 Bandwidth와 Burstness관점에서 실험을 통해 분석하였다.

• Journal of Korea Society of Digital Industry and Information Management
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• v.17 no.3
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• pp.9-15
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• 2021

In this paper, the Embedded MEMS system to the power apparatus used Edge Impulse machine learning tools and therefore an improved predictive system design is implemented. The proposed MEMS embedded system is developed based on nRF52840 system and the sensor with 3-Axis Digital Magnetometer, I2C interface and magnetic measurable range ±120 uT, BM1422AGMV which incorporates magneto impedance elements to detect magnetic field and the ARM M4 32-bit processor controller circuit in a small package. The MEMS embedded platform is consisted with Edge Impulse Machine Learning and system driver implementation between hardware and software drivers using SensorQ which is special queue including user application temporary sensor data. In this paper by experimenting, TensorFlow machine learning training output is applied to the power apparatus for analyzing the status such as "Normal, Warning, Hazard" and predicting the performance at level of 99.6% accuracy and 0.01 loss.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.12 no.12
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• pp.5564-5569
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• 2011

In this paper we introduced Augmented Reality (AR) on Android platform for ubiquitous learning (u-learning). Android is breaking new ground for mobile computing and open technologies. Android is versatile as it is not limited only to mobile phones, but it can be installed on various devices. Android gives developers the opportunity to leverage their development skills, while also building an exciting and active community. Augmented Reality (AR) is going to be the future of most apps; all it takes is a decent processor, a camera, a compass and a GPS, all of which are becoming increasingly common on smart phones. Through AR we can have educational tools that provide individuals with total flexibility to receive, send, and review training and detailed product information through an increasingly ubiquitous web-enabled communication device. In this paper, we proposed Augmented Reality for Species Identification using Android Smartphone with augmented reality in species determination. This study is appropriate in the field of Biology. This is useful in outdoor experimental activities of the students. Like for example while they are visiting the zoo, botanical garden and etc.

• Journal of the Korea Society of Computer and Information
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• v.14 no.10
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• pp.23-29
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• 2009

This paper presents the development of embedded network educational system. This is an educational equipment which enables user to have training over Network Configuration and Embedded network programming practice on Internet environment. The network education system is developed on embedded environment. based on using ethernet interface. On the development environment. PAX255 VLSI chip is used for the processor, the ADSv1.2 for debugging, uC/OS276 for RTOS. The system software was developed using C language. The ping program provided an educational environment for the student to compile and load it to run after doing practice of demonstration behavior. Afterwards programming procedure starts the step-by-step training just like the demonstration function. In other words, programming method how to design the procedure of ARP operation and ICMP operation is explained.

• Journal of Positioning, Navigation, and Timing
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• v.6 no.4
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• pp.195-203
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• 2017

A 2U cube satellite called SNUGLITE has been developed by GNSS Research Laboratory in Seoul National University. Its main mission is to perform actual operation by mounting dual-frequency global positioning system (GPS) receivers. Its scientific mission aims to observe space environments and collect data. It is essential for a cube satellite to control an Earth-oriented attitude for reliable and successful data transmission and reception. To this end, an attitude estimation and control algorithm, Attitude Determination and Control System (ADCS), has been implemented in the on-board computer (OBC) processor in real time. In this paper, the Extended Kalman Filter (EKF) was employed as the attitude estimation algorithm. For the attitude control technique, the Linear Quadratic Gaussian (LQG) was utilized. The algorithm was verified through the processor in the loop simulation (PILS) procedure. To validate the ADCS algorithm in the ground, the experimental verification via a single axis Hardware-in-the-loop simulation (HILS) was used due to the simplicity and cost effectiveness, rather than using the 3-axis HILS verification (Schwartz et al. 2003) with complex air-bearing mechanism design and high cost.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.2 no.4
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• pp.545-551
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• 1998

The Radio communication by existing SSB, VHF, etc. in a coast station and a base station for military affairs is still used to a very important the device of information delivery or transmitting and receiving by the remote controller to using to the exclusive cable for a equipment established at a long distance. When a number of consumer to connected and operated by a number of transceiver is essential for a circuit controller of ICS, in KOREA, is devoted by import to considerable quantity because of to be delayed development of this field. This Paper has been realized to optimal algorithm and designing of a circuit connection controller by multi-processor to pre-stage for the development of ICS. The H/W is composed able to remote control to circuit connector with the several slave processor and a processor for master, and this has taken possible through without any obstacle to communication circuits of a control signal by FSK system. The S/W make possible monitoring for communication condition of other circuits by means of a serial communication system by the multi-processing. This paper has been studied for connecting to a circuits wished to rapidly and precisely by the full application to a interrupt technique. A technique to control by remote to a number of transceiver is a way increasing to application for a frequency resource of the limited MF/SF, VHF and the existing radio communication technique. According to, this paper will achieve to be the reduction of energy & equipment and multiplicity of information delivery in the general communication and disposal to rapid and exact for the important communication as distress, urgency and safety on the sea.

• Journal of KIISE:Computing Practices and Letters
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• v.13 no.7
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• pp.433-441
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• 2007

The bio-Sensors, which are sensing the vital signs of human bodies, are largely used by the medical equipment. Recently, the sensor network technology, which composes of the sensor interface for small-seize hardware, processor, the wireless communication module and battery in small sized hardware, has been extended to the area of bio-senor network systems due to the advances of the MEMS technology. In this paper we have suggested a design and implementation of a health care information system(called u-EMS) using a bio-sensor network technology that is a combination of the bio-sensor and the sensor network technology. In proposed system, we have used the following vital body sensors such as EKG sensor, the blood pressure sensor, the heart rate sensor, the pulse oximeter sensor and the glucose sensor. We have collected various vital sign data through the sensor network module and processed the data to implement a health care measurement system. Such measured data can be displayed by the wireless terminal(PDA, Cell phone) and the digital-frame display device. Finally, we have conducted a series of tests which considered both patient's vital sign and context-awared information in order to improve the effectiveness of the u-EMS.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1993.06a
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• pp.975-976
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• 1993

This talk presents the overview of the author's research and development activities on fuzzy inference hardware. We involved it with two distinct approaches. The first approach is to use application specific integrated circuits (ASIC) technology. The fuzzy inference method is directly implemented in silicon. The second approach, which is in its preliminary stage, is to use more conventional microprocessor architecture. Here, we use a quantitative technique used by designer of reduced instruction set computer (RISC) to modify an architecture of a microprocessor. In the ASIC approach, we implemented the most widely used fuzzy inference mechanism directly on silicon. The mechanism is beaded on a max-min compositional rule of inference, and Mandami's method of fuzzy implication. The two VLSI fuzzy inference chips are designed, fabricated, and fully tested. Both used a full-custom CMOS technology. The second and more claborate chip was designed at the University of North Carolina(U C) in cooperation with MCNC. Both VLSI chips had muliple datapaths for rule digital fuzzy inference chips had multiple datapaths for rule evaluation, and they executed multiple fuzzy if-then rules in parallel. The AT & T chip is the first digital fuzzy inference chip in the world. It ran with a 20 MHz clock cycle and achieved an approximately 80.000 Fuzzy Logical inferences Per Second (FLIPS). It stored and executed 16 fuzzy if-then rules. Since it was designed as a proof of concept prototype chip, it had minimal amount of peripheral logic for system integration. UNC/MCNC chip consists of 688,131 transistors of which 476,160 are used for RAM memory. It ran with a 10 MHz clock cycle. The chip has a 3-staged pipeline and initiates a computation of new inference every 64 cycle. This chip achieved an approximately 160,000 FLIPS. The new architecture have the following important improvements from the AT & T chip: Programmable rule set memory (RAM). On-chip fuzzification operation by a table lookup method. On-chip defuzzification operation by a centroid method. Reconfigurable architecture for processing two rule formats. RAM/datapath redundancy for higher yield It can store and execute 51 if-then rule of the following format: IF A and B and C and D Then Do E, and Then Do F. With this format, the chip takes four inputs and produces two outputs. By software reconfiguration, it can store and execute 102 if-then rules of the following simpler format using the same datapath: IF A and B Then Do E. With this format the chip takes two inputs and produces one outputs. We have built two VME-bus board systems based on this chip for Oak Ridge National Laboratory (ORNL). The board is now installed in a robot at ORNL. Researchers uses this board for experiment in autonomous robot navigation. The Fuzzy Logic system board places the Fuzzy chip into a VMEbus environment. High level C language functions hide the operational details of the board from the applications programme . The programmer treats rule memories and fuzzification function memories as local structures passed as parameters to the C functions. ASIC fuzzy inference hardware is extremely fast, but they are limited in generality. Many aspects of the design are limited or fixed. We have proposed to designing a are limited or fixed. We have proposed to designing a fuzzy information processor as an application specific processor using a quantitative approach. The quantitative approach was developed by RISC designers. In effect, we are interested in evaluating the effectiveness of a specialized RISC processor for fuzzy information processing. As the first step, we measured the possible speed-up of a fuzzy inference program based on if-then rules by an introduction of specialized instructions, i.e., min and max instructions. The minimum and maximum operations are heavily used in fuzzy logic applications as fuzzy intersection and union. We performed measurements using a MIPS R3000 as a base micropro essor. The initial result is encouraging. We can achieve as high as a 2.5 increase in inference speed if the R3000 had min and max instructions. Also, they are useful for speeding up other fuzzy operations such as bounded product and bounded sum. The embedded processor's main task is to control some device or process. It usually runs a single or a embedded processer to create an embedded processor for fuzzy control is very effective. Table I shows the measured speed of the inference by a MIPS R3000 microprocessor, a fictitious MIPS R3000 microprocessor with min and max instructions, and a UNC/MCNC ASIC fuzzy inference chip. The software that used on microprocessors is a simulator of the ASIC chip. The first row is the computation time in seconds of 6000 inferences using 51 rules where each fuzzy set is represented by an array of 64 elements. The second row is the time required to perform a single inference. The last row is the fuzzy logical inferences per second (FLIPS) measured for ach device. There is a large gap in run time between the ASIC and software approaches even if we resort to a specialized fuzzy microprocessor. As for design time and cost, these two approaches represent two extremes. An ASIC approach is extremely expensive. It is, therefore, an important research topic to design a specialized computing architecture for fuzzy applications that falls between these two extremes both in run time and design time/cost. TABLEI INFERENCE TIME BY 51 RULES {{{{Time }}{{MIPS R3000 }}{{ASIC }}{{Regular }}{{With min/mix }}{{6000 inference 1 inference FLIPS }}{{125s 20.8ms 48 }}{{49s 8.2ms 122 }}{{0.0038s 6.4㎲ 156,250 }} }}

• Journal of the Korea Computer Industry Society
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• v.4 no.4
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• pp.547-552
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• 2003

In this thesis, interference phenomena of bluetooth networks requiring Security were minimized; strengthened security of piconet by assigning an identical PIN code to bluetooth devices, which was establishing a specific piconet during authentication stage. To establish a bluetooth piconet system. an unique ID was assigned to each bluetooth device, communication algorithms having different data formats between devices was designed, and an embedded hardware module using ARM processor and uCOS-II RTOS was implemented. About 30% of CPU efficiency in the module was increased by modifying functions including block parameters to work as nonblocking; by the increased efficiency of total piconet, the module could be used as an access point. The module could transmit maximum 10 frames of image and also audio signal by switching the packet effectively according to channel condition. By above-mentioned process, video, audio, and data could be well transmitted by the bluetooth managing program and the possibility of a commercial remote control system using bluetooth technology was suggested.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.1
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• pp.175-181
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• 2015

In this paper, we develop a 2.4GHz ISM band wireless communication platform prototype based on embedded linux which support can be u-Hospital service. The developed system is available connecting between ARM920T processor board and FPGA board and linking IEEE 802.11b PHY board, AD/DA(10Bit) and RF(2.4GHz) board for wireless access. It is also can be utilized for the embedded system design with IEEE 802.11b/g Access Point(Option: IEEE 802.11a/b/g) test due to the Embedded Linux. Also, the developed system is possible to test and verify the radio access technology, Modem(OFDM etc) and IP(Intellectual Property) circuit. And make the most use of the system, we search for a expansion to that home and mobile healthcare, wellness service application.