• Title/Summary/Keyword: trench gate

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Moisture Induced Hump Characteristics of Shallow Trench-Isolated nMOSFET (Shallow Trench Isolation 공정에서 수분에 의한 nMOSFET의 Hump 특성)

  • Lee, Young-Chul
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.12
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    • pp.2258-2263
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    • 2006
  • In this parer, hump characteristics of short-channel nMOSFETs induced by moistures of the ILD(inter-layer dielectric) layer in the shallow trench isolation (STI) process are investigated and the method for hump suppression is proposed Using nMOSFETs with various types of the gate and a measurement of TDS-APIMS (Thermal Desorption System-Atmospheric Pressure ionization Mass Spectrometry), hump characteristics were systematically analyzed and the systemic analysis based hump model was presented; the ILD layer over poly-Si gate of nMOSFET generates moistures, but they can't diffuse out of the SiN layer due to the upper SiN layer. Consequently, they diffuses into the edge between the gate and STI and induces short-channel hump. In order to eliminate moisture in the ILD layer by out-gassing method, the annealing process prior to the deposition of the SiN layer was carried out. As the result, short-channel humps of the nMOSFETs were successfully suppressed.

The Electrical Characteristics of 1200V Trench Gate MOSFET Based on SiC (1200V급 SiC 기반 트렌치 게이트 MOSFET의 전기적 특성에 관한 연구)

  • Yu Rim Kim;Dong Hyeon Lee;Min Seo Kim;Jin Woo Choi;Ey Goo Kang
    • Journal of IKEEE
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    • v.27 no.1
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    • pp.103-108
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    • 2023
  • This research was carried out experiments with changing processes and design parameters to optimally design a SiC-based 1200V power MOSFET, and then, essential electrical characteristics were derived. In order to secure the excellence of the trench gate type SiC power MOSFET device to be designed, electrical characteristics were derived by designing it under conditions such as planner gate SiC power MOSFET, and it was compared with the trench gate type SiC power MOSFET device. As a result of the comparative analysis, the on-resistance while maintaining the yield voltage was 1,840mΩ, for planner gate power MOSFET and to 40mΩ for trench gate power MOSFET, respectively, indicating characteristics more than 40 times better. It was judged that excellent results were derived because the temperature resistance directly affects energy efficiency. It is predicted that the devices optimized through this experiment can sufficiently replace the IGBT devices generally used in 1200V class, and that since the SiC devices are wide band gap devices, they will be widely used to apply semiconductors for vehicles using devices with excellent thermal characteristics.

A Study on Electrical Characteristics and Optimization of Trench Power MOSFET for Industrial Motor Drive

  • Kang, Ey Goo
    • Journal of IKEEE
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    • v.17 no.3
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    • pp.365-370
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    • 2013
  • Power MOSFET is developed in power savings, high efficiency, small size, high reliability, fast switching, and low noise. Power MOSFET can be used in high-speed switching transistors devices. Recently attention given to the motor and the application of various technologies. Power MOSFET is a voltage-driven approach switching device and designed to handle on large power, power supplies, converters, motor controllers. In this paper, the 400 V Planar type, and the trench type for realization of low on-resistance are designed. Trench Gate Power MOSFET Vth : 3.25 V BV : 484 V Ron : 0.0395 Ohm has been optimized.

A study on the Dislocation-Free Shallow Trench Isolation (STI) Process (Dislocation-Free Shallow Trench Isolation 공정 연구)

  • Yoo, Hae-Young;Kim, Nam-Hoon;Kim, Sang-Yong;Lee, Woo-Sun;Chang, Eui-Goo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.11a
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    • pp.84-85
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    • 2005
  • Dislocations are often found at Shallow Trench Isolation (STI) process after repeated thermal cycles. The residual stress after STI process often leads defect like dislocation by post STI thermo-mechanical stress. Thermo-mechanical stress induced by STI process is difficult to remove perfectly by plastic deformation at previous thermal cycles. Embedded flash memory process is very weak in terms of post STI thermo-mechanical stress, because it requires more oxidation steps than other devices. Therefore, dislocation-free flash process should be optimized.

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A Small Scaling Lateral Trench IGBT with Improved Electrical Characteristics for Smart Power IC (스마트 파워 IC를 위한 향상된 전기특성의 소규모 횡형 트랜치 IGBT)

  • 문승현;강이구;성만영
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.267-270
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    • 2001
  • A new small scaling Lateral Trench Insulated Gate Bipolar Transistor (SSLTIGBT) was proposed to improve the characteristics of the device. The entire electrode of the LTIGBT was replaced with a trench-type electrode. The LTIGBT was designed so that the width of device was no more than 10$\mu\textrm{m}$. The latch-up current densities were improved by 4.5 and 7.6 times, respectively, compared to those of the same sifted conventional LTIGBT and the conventional LTIGBT which has the width of 17$\mu\textrm{m}$. The enhanced latch-up capability of the SSLTIGBT was obtained due to the fact that the hole current in the device reaches the cathode via the p+ cathode layer underneath the n+ cathode layer, directly. The forward blocking voltage of the SSLTIGBT was 125 V. At the same size, those of the conventional LTIGBT and the conventional LTIGBT with the width of 17$\mu\textrm{m}$ were 65 V and 105 V, respectively. Because the proposed device was constructed of trench-type electrodes, the electric field in the device were crowded to trench oxide. Thus, the punch through breakdown of LTEIGBT occurred late.

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A Novel Structure for the Improved Switching Time of 50V Class Vertical Power MOSFET

  • Cho, Doohyung;Park, Kunsik;Kim, Kwangsoo
    • Journal of IKEEE
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    • v.19 no.1
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    • pp.110-117
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    • 2015
  • In this paper, a novel trench power MOSFET using a Separate-W-gated technique MOSFET (SWFET) is proposed. Because the SWFET has a very low $Q_{GD}$ compared to other forms of technology, it can be applied to high-speed power systems. The results found that the SWFET-applied $Q_{GD}$ was decreased by 40% when compared to simply using the more conventional trench gate MOSFET. $C_{ISS}$ (input capacitance : $C_{GS}+C_{GD}$), $C_{OSS}$ (output capacitance : $C_{GD}+C_{DS}$) and $C_{RSS}$ (reverse recovery capacitance : $C_{GD}$) were improved by 24%, 40%, and 50%, respectively. The switching characteristics of the inverter circuit shows a 24.9% enhancement of reverse recovery time, and the power efficiency of the DC-DC buck converter increased by 14.2%. In addition, the proposed SWFET does not require additional process steps and There was no degradation in the electrical performance of the current-voltage and on-resistance.

Constant Frequency Adjustable Power Active Voltage Clamped Soft Switching High Frequency Inverter using The 4th-Generation Trench-Gate IGBTs

  • Miyauchi T.;Hirota I.;Omori H.;Terai H.;Abdullah Al Mamun;Nakaoka M.
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.236-241
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    • 2001
  • This paper presents a novel prototype of active voltage-clamping capacitor-assisted edge resonant soft switching PWM inverter operating at a constant frequency variable power (VPCF) regulation scheme, which is suitable for consumer high-power induction-heating cooking appliances. New generation IGBT with a trench gate is particularly improved in order to reduce conduction loss due to its lowered saturation voltage characteristics. The soft switching load resonant and quasi-resonant inverter designed distinctively using the latest IGBTs is evaluated from an experimental point of view.

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The Characteristics and Technical Trends of Power MOSFET (전력용 MOSFET의 특성 및 기술동향)

  • Bae, Jin-Yong;Kim, Yong
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.7
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    • pp.1363-1374
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    • 2009
  • This paper reviews the characteristics and technical trends in Power MOSFET technology that are leading to improvements in power loss for power electronic system. The silicon bipolar power transistor has been displaced by silicon power MOSFET's in low and high voltage system. The power electronic technology requires the marriage of power device technology with MOS-gated device and bipolar analog circuits. The technology challenges involved in combining power handling capability with finger gate, trench array, super junction structure, and SiC transistor are described, together with examples of solutions for telecommunications, motor control, and switch mode power supplies.

Alternative Optimization Techniques for Shallow Trench Isolation and Replacement Gate Technology Chemical Mechanical Planarization

  • Stefanova, Y.;Cilek, F.;Endres, R.;Schwalke, U.
    • Transactions on Electrical and Electronic Materials
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    • v.8 no.1
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    • pp.1-4
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    • 2007
  • This paper discusses two approaches for pre-polishing optimization of oxide chemical mechanical planarization (CMP) that can be used as alternatives to the commonly applied dummy structure insertion in shallow trench isolation (STI) and replacement gate (RG) technologies: reverse nitride masking (RNM) and oxide etchback (OEB). Wafers have been produced using each optimization technique and CMP tests have been performed. Dishing, erosion and global planarity have been investigated with the help of conductive atomic force microscopy (C-AFM). The results demonstrate the effectiveness of both techniques which yield excellent planarity without dummy structure related performance degradation due to capacitive coupling.

Trench-gate SOI LIGBT with improved latch-up capability (향상된 Latch-up 특성을 갖는 트렌치 게이트 SOI LIGBT)

  • 이병훈;김두영;유종만;한민구;최연익
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.1
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    • pp.103-110
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    • 1995
  • Trench-Gate SOI LIGBT with improved latch-up capability has been proposed and verified by MEDICI simulation. The new SOI LIGBT exhibits 6 time larger latch-up capability of the new device is almost preserved independent of lifetime. the large latch-up capability of the new SOI LIGBT may be realized due to the fact that the hole current in the new device would bypass through the shorted cathode contact without passing the p-well region under the n+ cathode. Forward voltage drop is increased by 25% when a epi thickness is 6$\mu$m. However, the increase of the forward voltage is negligible when the epi thickness is increased to 10$\mu$m. It is found that the swithcing time of the new device is almost equal to the conventional devices. Evaluated breakdown voltage of proposed SOILIGBT is 250 V and that of the conventional SOI LIGBT is 240 V, where the thickness of the vuried oxide and n- epi is 3$\mu$m and 6$\mu$m, respectively.

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