• Title/Summary/Keyword: transparent oxide semiconductor

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저온 공정 온도에서 $Al_2O_3$ 게이트 절연물질을 사용한 InGaZnO thin film transistors

  • 우창호;안철현;김영이;조형균
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2010년도 하계학술대회 논문집
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    • pp.11-11
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    • 2010
  • Thin-film-transistors (TFTs) that can be deposited at low temperature have recently attracted lots of applications such as sensors, solar cell and displays, because of the great flexible electronics and transparent. Transparent and flexible transistors are being required that high mobility and large-area uniformity at low temperature [1]. But, unfortunately most of TFT structures are used to be $SiO_2$ as gate dielectric layer. The $SiO_2$ has disadvantaged that it is required to high driving voltage to achieve the same operating efficiency compared with other high-k materials and its thickness is thicker than high-k materials [2]. To solve this problem, we find lots of high-k materials as $HfO_2$, $ZrO_2$, $SiN_x$, $TiO_2$, $Al_2O_3$. Among the High-k materials, $Al_2O_3$ is one of the outstanding materials due to its properties are high dielectric constant ( ~9 ), relatively low leakage current, wide bandgap ( 8.7 eV ) and good device stability. For the realization of flexible displays, all processes should be performed at very low temperatures, but low temperature $Al_2O_3$ grown by sputtering showed deteriorated electrical performance. Further decrease in growth temperature induces a high density of charge traps in the gate oxide/channel. This study investigated the effect of growth temperatures of ALD grown $Al_2O_3$ layers on the TFT device performance. The ALD deposition showed high conformal and defect-free dielectric layers at low temperature compared with other deposition equipments [2]. After ITO was wet-chemically etched with HCl : $HNO_3$ = 3:1, $Al_2O_3$ layer was deposited by ALD at various growth temperatures or lift-off process. Amorphous InGaZnO channel layers were deposited by rf magnetron sputtering at a working pressure of 3 mTorr and $O_2$/Ar (1/29 sccm). The electrodes were formed with electron-beam evaporated Ti (30 nm) and Au (70 nm) bilayer. The TFT devices were heat-treated in a furnace at $300^{\circ}C$ and nitrogen atmosphere for 1 hour by rapid thermal treatment. The electrical properties of the oxide TFTs were measured using semiconductor parameter analyzer (4145B), and LCR meter.

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GZO/ZTO 투명전극을 이용한 DSSC의 광전 변환 효율 특성 (Sputtered ZTO as a blocking layer at conducting glass and $TiO_2$ Interfaces in Dye-Sensitized Solar Cells)

  • 박재호;이경주;송상우;조슬기;문병무
    • 한국신재생에너지학회:학술대회논문집
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    • 한국신재생에너지학회 2011년도 추계학술대회 초록집
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    • pp.53.2-53.2
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    • 2011
  • Dye-sensitized solar cells(DSSCs) have been recognized as an alternative to the conventional p-n junction solar cells because of their simple fabrication process, low production cost, and transparency. A typical DSSC consists of a transparent conductive oxide (TCO) electrode, a dye-sensitized oxide semiconductor nanoparticle layer, liquid redox electrolyte, and a Pt-counter electrode. In dye-sensitized solar cells, charge recombination processes at interfaces between coducting glass, $TiO_2$, dye, and electrolyte play an important role in limiting the photon-to-electron conversion efficiency. A layer of ZTO thin film less than ~200nm in thickness, as a blocking layer, was deposited by DC magnetron sputtering method directly onto the anode electrode to be isolated from the electrolyte in dye-sensitized solar cells(DSCs). This is to prevent the electrons from back-transferring from the electrode to the electrolyte ($I^-/I_3^-$). The presented DSCs were fabricated with working electrode of Ga-doped ZnO glass coated with blocking ZTO layer, dye-attached nanoporous $TiO_2$ layer, gel electrolyte and counter electrode of Pt-deposited GZO glass. The effects of blocking layer were studied with respect to impedance and conversion efficiency of the cells.

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Properties of IZTO Thin Films Deposited on PEN Substrates with Different Working Pressures

  • Park, Jong-Chan;Kang, Seong-Jun;Yoon, Yung-Sup
    • 한국세라믹학회지
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    • 제52권3호
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    • pp.224-227
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    • 2015
  • In this work, the properties of Indium-Zinc-Tin-Oxide (IZTO) thin films, deposited on polyethylene naphthalate (PEN) with a $SiO_2$ buffer layer, were analyzed with different working pressures. After depositing the $SiO_2$ buffer layer on PEN substrates by plasma-enhanced chemical vapor deposition (PECVD), the IZTO thin films were deposited by RF magnetron sputtering with 1 to 7-mTorr working pressure. All the IZTO thin films show an amorphous structure, regardless of the working pressure. The best morphological, electrical, and optical properties are obtained at 3-mTorr working pressure, with a surface roughness of 2.112-nm, a sheet resistance of $8.87-{\Omega}/sq$, and a transmittance at 550-nm of 88.44%. These results indicate that IZTO thin films deposited on PEN have outstanding electrical and optical properties, and the PEN plastic substrate is a suitable material for display devices.

산화물 반도체의 다양한 처리를 통한 박막트랜지스터의 전기적 특성 향상 (A Review : Improvement of Electrical Performance in the Oxide Semiconductor Thin Film Transistor Using Various Treatment)

  • 김태용;장경수;;;이소진;강승민;;이윤정;이준신
    • 한국전기전자재료학회논문지
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    • 제29권1호
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    • pp.1-5
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    • 2016
  • The ultimate aims of display market is transparent or flexible. Researches have been carried out for various applications. It has been possible to reduced the process steps and get good electrical properties for semiconductors with large optical bandgaps. Oxide semiconductors have been established as one of the leading and promising technology for next generation display panels. In this paper, alternative treatment processes have been tried for oxide semiconductors of thin film transistors to increase the electrical properties of the thin film transistors and to investigate the mechanisms. There exist a various oxide semiconductors. Here, we focused on InGaZnO, ZnO and InSnZnO which are commercialized or researched actively.

High performance of fully transparent amorphous In-Ga-Zn-O junctionless Thin-Film-Transistor (TFT) by microwave annealing

  • 이현우;안민주;조원주
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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    • pp.208.1-208.1
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    • 2015
  • 최근, 차세대 투명 디스플레이 구동소자로서 산화물 반도체를 이용한 Transparent Amorphous Oxide Semiconductor (TAOS) 기술이 큰 주목을 받고 있다. 산화물 반도체는 기존의 a-Si에 비해 우수한 전기적인 특성과 낮은 구동전압 그리고 넓은 밴드 갭으로 인한 투명성의 장점들이 있다. 그리고 낮은 공정 온도에서도 제작이 가능하기 때문에 유리나 플라스틱과 같은 다양한 기판에서도 박막 증착이 가능하다. 하지만 기존의 furnace를 이용한 열처리 방식은 낮은 온도에서 우수한 전기적인 특성을 내기 어려우며, 공정 시간이 길어지는 단점들이 있다. 따라서 본 연구에서는 산화물 반도체중 In-Ga-Zn-O (IGZO)와 In-Sn-O(ITO)를 각각 채널 층과 게이트 전극으로 이용하였다. 또한 마이크로웨이브 열처리 기술을 이용하여 기존의 열처리 방식에 비해 에너지 전달 효율이 높고 짧은 시간동안 저온 공정이 가능하며 우수한 전기적인 특성을 가지는 투명 박막 트랜지스터를 구현 하였다. 본 실험은 glass 기판위에서 진행되었으며, RF sputter를 이용하여 ITO를 150 nm 증착한 후, photo-lithography 공정을 통하여 하부 게이트 전극을 형성하였다. 이후에 RF sputter를 이용하여 SiO2 와 IGZO 를 각각 300, 50 nm 증착하였고, patterning 과정을 통하여 채널 영역을 형성하였다. 또한 소자의 전기적인 특성 향상을 위해 마이크로웨이브 열처리를 1000 Watt로 2 분간 진행 하였고, 비교를 위하여 기존 방식인 furnace 를 이용하여 N2 분위기에서 $400^{\circ}C$로 30분간 진행한 소자도 병행하였다. 그 결과 마이크로웨이브를 통해 열처리한 소자는 공정 온도가 $100^{\circ}C$ 이하로 낮기 때문에 glass 기판에 영향을 주지 않고 기존 furnace 열처리 한 소자보다 전체적으로 전기적인 특성이 우수한 것을 확인 하였다.

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유연기판위에 상분리를 이용한 반도체 나노입자 증착 (Deposition of Nanocrystals using Phase Separation on Flexible Substrates)

  • 오승균;정국채;김영국;최철진
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.284-284
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    • 2009
  • We have fabricated semiconductor nanocrystals using phase separation on flexible substrates for future application in QD-LEDs. The phase separation between the CdSe semiconductor nanocrystals and TPD organic underlayer can occur during the solvent drying, and the CdSe may rise towards the surface of the coated films, which is arranged into close packed array called self-assembly process. In this work, the polyethylene naphthalate (PEN) films of $200{\mu}m$ thickness was used as a flexible substrate, which was coated with indium tin oxide(ITO) as a transparent electrode of <$15{\Omega}/cm^2$. A number of solvents such as chloroform, toluene, and hexane was used and their coating properties were investigated using the spin coating process. The dispersion of both QD and TPD was rather poor in toluene and hexane and resulted in rougher surface and some aggregates. Meanwhile, the surface roughness of templates can be a very critical issue in the fabrication of QD-LED devices. Some experiments was performed to reduce the ~4nm surface roughness of the PEN films and It can be decreased to the minimum of ~0.7nm. Also discussed are the optical properties of semiconductor nanocrystals used in this phase separation and possible large area and continuous coating process for future application.

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Semiconductor CdTe-Doped CdO Thin Films: Impact of Hydrogenation on the Optoelectronic Properties

  • Dakhel, Aqeel Aziz;Jaafar, Adnan
    • 한국재료학회지
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    • 제30권1호
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    • pp.1-7
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    • 2020
  • Doping or incorporation with exotic elements are two manners to regulate the optoelectronic properties of transparent conducting (TCO) cadmium oxide (CdO). Nevertheless, the method of doping host CdO by CdTe semiconductor is of high importance. The structural, optical, and electrical properties of CdTe-doped CdO films are studied for the sake of promoting their conducting parameters (CPs), including their conductivity, carrier concentration, and carrier mobility, along with transparency in the NIR spectral region; these are then compared with the influence of doping the host CdO by pure Te ions. X-ray fluorescence (XRF), X-ray diffraction (XRD), optical absorption spectroscopy, and electrical measurements are used to characterise the deposited films prepared by thermal evaporation. Numerous results are presented and discussed in this work; among these results, the optical properties are studied through a merging of concurrent BGN (redshift) and BGW (blue shift) effects as a consequence of doping processes. The impact of hydrogenation on the characterisations of the prepared films is investigated; it has no qualitative effect on the crystalline structure. However, it is found that TCO-CPs are improved by the process of CdTe doping followed by hydrogenation. The utmost TCO-CP improvements are found with host CdO film including ~ 1 %Te, in which the resistivity decreases by ~ 750 %, carrier concentration increases by 355 %, and mobility increases by ~ 90 % due to the increase of Ncarr. The improvement of TCO-CPs by hydrogenation is attributed to the creation of O-vacancies because of H2 molecule dissociation in the presence of Te ions. These results reflect the potential of using semiconductor CdTe -doped CdO thin films in TCO applications. Nevertheless, improvements of the host CdO CPs with CdTe dopant are of a lesser degree compared with the case of doping the host CdO with pure Te ions.

Efficiency Improvement in InGaN-Based Solar Cells by Indium Tin Oxide Nano Dots Covered with ITO Films

  • Seo, Dong-Ju;Choi, Sang-Bae;Kang, Chang-Mo;Seo, Tae Hoon;Suh, Eun-Kyung;Lee, Dong-Seon
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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    • pp.345-346
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    • 2013
  • InGaN material is being studied increasingly as a prospective material for solar cells. One of the merits for solar cell applications is that the band gap energy can be engineered from 0.7 eV for InN to 3.4 eV for GaN by varying of indium composition, which covers almost of solar spectrum from UV to IR. It is essential for better cell efficiency to improve not only the crystalline quality of the epitaxial layers but also fabrication of the solar cells. Fabrication includes transparent top electrodes and surface texturing which will improve the carrier extraction. Surface texturing is one of the most employed methods to enhance the extraction efficiency in LED fabrication and can be formed on a p-GaN surface, on an N-face of GaN, and even on an indium tin oxide (ITO) layer. Surface texturing method has also been adopted in InGaN-based solar cells and proved to enhance the efficiency. Since the texturing by direct etching of p-GaN, however, was known to induce the damage and result in degraded electrical properties, texturing has been studied widely on ITO layers. However, it is important to optimize the ITO thickness in Solar Cells applications since the reflectance is fluctuated by ITO thickness variation resulting in reduced light extraction at target wavelength. ITO texturing made by wet etching or dry etching was also revealed to increased series resistance in ITO film. In this work, we report a new way of texturing by deposition of thickness-optimized ITO films on ITO nano dots, which can further reduce the reflectance as well as electrical degradation originated from the ITO etching process.

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The Effect of Substrate Temperature on the Electrical, Electronic, Optical Properties and the Local Structure of Transparent Nickel Oxide Thin Films

  • Lee, Kangil;Kim, Beomsik;Kim, Juhwan;Park, Soojeong;Lee, Sunyoung;Denny, Yus Rama;Kang, Hee Jae;Yang, Dong-Seok
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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    • pp.397-397
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    • 2013
  • The electrical, electronic, optical properties and the local structure of Nickel Oxide (NiO) thin film have been investigated by X-ray photoelectron spectroscopy (XPS), Reflection Electron Energy Loss Spectroscopy (REELS), UV-spectrometer,Hall Effect measurement and X-ray absorption spectroscopy (XAS). The XPS results show that the Ni 2p spectra for all films consist of $Ni2p_{3/2}$ at around 854.5 eV which indicate the presence of Ni-O bond from NiO phase and for the annealed film at temperature above $200^{\circ}C$ shows the coexist Ni oxide and Ni metal phase. The REELS spectra showed that the band gaps of the NiO thin films were abruptly decreased with increasing temperature. The values of the band gaps are consistent with the optical band gaps estimated by UV-Spectrometer. The optical transmittance spectra shows that the transparency of NiO thin films in the visible light region was deteriorated with higher temperature due to existence of $Ni^0$. Hall Effect measurement suggest that the NiO thin films prepared at relatively low temperatures (RT and $100^{\circ}C$) are suitable for fabricating p-type semiconductor which showed that the best properties was achieved at $100^{\circ}C$, such as a low resistivity of $7.49{\Omega}.cm$. It can be concluded that the annealing process plays a crucial role in converting from p type to n type semiconductor which leads to reducing electrical resistivity of NiO thin films. Furthermore, the extended X-ray absorption fine structure (EXAFS) spectrum at the Ni K-edge was used to address the local structure of NiO thin films. It was found that the thermal treatments increase the order in the vicinity of Ni atom and lead the NiO thin films to bunsenite crystal structure. Moreover, EXAFS spectra show in increasing of coordination number for the first Ni-O shell and the bond distance of Ni-O with the increase of substrate temperature.

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The improvement of electrical properties of InGaZnO (IGZO)4(IGZO) TFT by treating post-annealing process in different temperatures.

  • Kim, Soon-Jae;Lee, Hoo-Jeong;Yoo, Hee-Jun;Park, Gum-Hee;Kim, Tae-Wook;Roh, Yong-Han
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2010년도 제39회 하계학술대회 초록집
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    • pp.169-169
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    • 2010
  • As display industry requires various applications for future display technology, which can guarantees high level of flexibility and transparency on display panel, oxide semiconductor materials are regarded as one of the best candidates. $InGaZnO_4$(IGZO) has gathered much attention as a post-transition metal oxide used in active layer in thin-film transistor. Due to its high mobility fabricated at low temperature fabrication process, which is proper for application to display backplanes and use in flexible and/or transparent electronics. Electrical performance of amorphous oxide semiconductors depends on the resistance of the interface between source/drain metal contact and active layer. It is also affected by sheet resistance on IGZO thin film. Controlling contact/sheet resistance has been a hot issue for improving electrical properties of AOS(Amorphous oxide semiconductor). To overcome this problem, post-annealing has been introduced. In other words, through post-annealing process, saturation mobility, on/off ratio, drain current of the device all increase. In this research, we studied on the relation between device's resistance and post-annealing temperature. So far as many post-annealing effects have been reported, this research especially analyzed the change of electrical properties by increasing post-annealing temperature. We fabricated 6 main samples. After a-IGZO deposition, Samples were post-annealed in 5 different temperatures; as-deposited, $100^{\circ}C$, $200^{\circ}C$, $300^{\circ}C$, $400^{\circ}C$ and $500^{\circ}C$. Metal deposition was done on these samples by using Mo through E-beam evaporation. For analysis, three analysis methods were used; IV-characteristics by probe station, surface roughness by AFM, metal oxidation by FE-SEM. Experimental results say that contact resistance increased because of the metal oxidation on metal contact and rough surface of a-IGZO layer. we can suggest some of the possible solutions to overcome resistance effect for the improvement of TFT electrical performances.

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