• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.149-150
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• 2005

Thyristor breakdown voltage variation acceleration aging test was investigated. The breakdown voltage was deceased after 1000 hours acceleration aging test. It temperature rising caused by electric field concentration at the edge beveling region of the thyristor was confirmed using Silvaco device simulation. The local temperature rising is driving force for the defect propagation. Consequently, propagated defects of the beveling region seems to decrease thyristor's breakdown voltage.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.10
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• pp.794-798
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• 2011

This paper was carried out design of 1,700 V Base Resistance Thyristor for fabrication. We decided conventional BRT (base resistance thyristor) device and Trench Gate type one for design. we carried out device and process simulation with T-CAD tools. and then, we have extracted optimal device and process parameters for fabrication. we have analysis electrical characteristics after simulations. As results, we obtained 2,000 V breakdown voltage and 3.0 V Vce,sat. At the same time, we carried out field ring simulation for obtaining high voltage.

• Proceedings of the KIPE Conference
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• 2010.11a
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• pp.369-370
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• 2010

토카막(Tokamak)형 핵융합실험장치의 초전도전자석 전원공급장치는 수 kV, 수십 kA의 대전력 직류전원를 얻기 위한 ac-dc 컨버터가 필요하다. 이와 같은 고전압, 대전류 사양을 얻기 위하여 일반적으로 thyristor ac-dc 컨버터를 사용하며, 필요한 전류사양을 충족하기 위하여 다수의 대전류용 thyristor 소자를 병렬로 연결하여 각 암(arm)의 스위치를 구성한다. 이와 같이 다수의 반도체 스위치 소자를 병렬로 연결하여 사용하는 경우에는 각 단위 소자별 전압강하, 직렬회로 임피던스 및 전류 경로 차이 등의 이유로 균등한 전류 배분을 얻기가 쉽지 않다. 본 논문에서는 각 암(arm)마다 8개씩의 대전류 thyristor 를 병렬로 연결 구성하여 제작한 시작품 단상 컨버터에 대한 전류배분 실험을 실시하고 그 결과를 분석 및 정리한다.

• Proceedings of the Optical Society of Korea Conference
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• 2003.07a
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• pp.220-221
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• 2003

We optimized the structure of a fully depleted optical thyristor (DOT) to achieve the faster switching speed and the lower power consumption by the depletion of charge at the lower negative voltage. The fabricated optical thyristor shows sufficient nonlinear s-shape I-V characteristics with the switching voltage of 2.85 V and the complete depletion voltage of -8.73 V. In this paper, using a finite difference method (FDM), we calculate the effects of parameters such as doping concentration and thickness of each layer to determine the optimized structure in the view of the fast and low-power-consuming operation.

• Proceedings of the KIEE Conference
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• 1984.07a
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• pp.270-271
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• 1984

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.7 s.349
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• pp.1-6
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• 2006

We show for the first time the optical properties of the selectively oxidized vertical cavity laser (VCL) - depleted optical thyristor (DOT), which has not only a low threshold current, but also a high sensitivity to the optical input light. In order to analyze their switching characteristics, nonlinear s-shaped current-voltage characteristics are calculated and the reverse full-depletion voltages (Vneg's) are obtained as function of semiconductor parameters by using a finite difference method (FDM). The selectively oxidized PnpN VCL-DOT clearly shows the nonlinear s-shaped current-voltage and lasing characteristics. A switching voltage of 5.24 V, a holding voltage of 1.50 V, a spectral response at 854.5 nm, and a very low threshold current of 0.65 mA is measured, making these devices attractive for optical processing applications.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.7C
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• pp.712-722
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• 2002

We have investigated a novel optical decoder for a fiber-optic code division multiple access(CDMA) communication systems. The conventional optical encoder and decoder have the advantage of simple structure. However the number of users in the system is limited by the auto- and cross-correlation properties generated in decoding process. In previous studies, to improve the system performance, although they used an optical code that minimize the sidelobe and cross-correlation, could not yet find a novel methods for performance improvement in fiber-optic CDMA system. Thus, it is necessary to investigate the novel optical decode in order to improve the performance of system. In this paper, we schematize the AND gate logic element(AGLE) composed with 1$\times$2 or 1$\times$3 coupler and the optical thyristor and propose the novel optical decoder using K(weight) AGLE. The optical thyristor only passes the overlapped signal and clips other signals. Such a novel concept means that the optical thyristor can operate as a hard-limiter. We analyze the fiber-optic CDMA system using the novel optical decoder with simulation and is found that the novel optical decoder using the AGLE and optical thyristor excludes the sidelobe and cross-correlation intensity between any two sequences.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.1 no.2
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• pp.82-87
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• 1987

본 연구에서는 GTO Thyristor로 구성하고 개선한 대용량 전류형GTO Inveter를 설계하였다. 부하로서는 유도전류기를 사용하였으며, 그 동작 특성을 비교 검토한 결과 전류콘덴서를 사용하지 않으므로 전류시 Chopper 회로에 과도현상을 줄였으므로 회로에 안정성이 향상됨을 나타내었다.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.9
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• pp.1437-1443
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• 2017

Electric energy is consumed or regenerated according to an operation of electric rail cars in urban railway power substations. A thyristor dual converter system is used to deal with the electric energy. Since the AC input voltage of power substations is $22.9kV{\pm}10%$, the magnitude of the AC voltage fluctuates according to load conditions, so the secondary side voltage of the DDY transformer also fluctuates. In the thyristor dual converter, the response characteristics of the DC output voltage and the DC output current are changed based on an initial firing angle in the cross mode conversion between the forward mode and the reverse mode. Therefore, this paper proposes the initial firing angle tracking algorithm considering fluctuation of the AC input voltage. The effectiveness of the proposed algorithm is verified by a simulation compared with the conventional algorithm.

• Proceedings of the KIPE Conference
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• 2014.11a
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• pp.163-164
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• 2014

전력계통은 전력수요의 지속적인 성장에 따라서 전력설비의 추가를 지속적으로 추진하고 있지만, 심해지는 환경문제 등으로 인해 용지 확보에 어려움이 있다. 이로 인해 송전선로 장거리화, 용량부족량 등 전력계통에 여러 가지 복잡한 문제가 야기되는데. 이것은 곧 전력계통의 안정도와 직결된다. 이러한 문제를 효과적이면서 경제적인 해결방법으로 FACT(Flexible AC Transmission System)기술이 주목 받고 있다. FACTS 기기 중 SVC(Static Var Compensator)는 상용운전 중이며, 기존 동기조상기에 비해 저렴하고, 신속 정확한 전압제어를 하는 장점이 있다. SVC는 TCR(Thyristor Controlled Reactor)과 TSC(Thyristor Switched Capacitor), FC(Fixed Capacitor)등 여러 종류의 구성을 가지고 있다. 합성시험회로설비(Synthetic Test Circuit)는 Thyristor로 구성된 TCR, TSC Valve를 실제 운전조건으로 동작시켜 SVC Valve의 신뢰성을 검증하는 설비이다. 특히, TSC Valve는 운전시 초기 과전류가 발생하는 운전특성상 이에 대한 평가기준에 따른 시험을 통해 신뢰성을 반드시 검증하여야 한다. 본 논문에서는 IEC 61954에서 제시하는 시험평가 기준에 의거하여 TSC의 Overcurrent Test를 위한 STC 평가 방법를 기술하고 설계된 TSC 시험을 위한 STC topology와 Simulation으로 검증 방법을 기술한다.