• Journal of the Microelectronics and Packaging Society
• /
• v.20 no.1
• /
• pp.7-13
• /
• 2013

3D stacked IC is one of the promising candidates which can keep Moore's law valid for next decades. IC can be stacked through various bonding technologies and they were reviewed in this report, for example, wafer direct bonding and atomic diffusion bonding, etc. As an effort to reduce the high temperature and pressure which were required for high bonding strength in conventional Cu-Cu thermo-compression bonding, surface activated bonding, solid liquid inter-diffusion and direct bonding interface technologies are actively being developed.

• Journal of the Microelectronics and Packaging Society
• /
• v.30 no.4
• /
• pp.98-104
• /
• 2023

The feasibility of an efficient process proposed for Cu-Cu flip-chip bonding was evaluated by forming a porous Cu layer on Cu pillar and conducting thermo-compression sinter-bonding after the infiltration of a reducing agent. The porous Cu layers on Cu pillars were manufactured through a three-step process of Zn plating-heat treatment-Zn selective etching. The average thickness of the formed porous Cu layer was approximately 2.3 ㎛. The flip-chip bonding was accomplished after infiltrating reducing solvent into porous Cu layer and pre-heating, and the layers were finally conducted into sintered joints through thermo-compression. With reduction behavior of Cu oxides and suppression of additional oxidation by the solvent, the porous Cu layer densified to thickness of approximately 1.1 ㎛ during the thermo-compression, and the Cu-Cu flip-chip bonding was eventually completed. As a result, a shear strength of approximately 11.2 MPa could be achieved after the bonding for 5 min under a pressure of 10 MPa at 300 ℃ in air. Because that was a result of partial bonding by only about 50% of the pillars, it was anticipated that a shear strength of 20 MPa or more could easily be obtained if all the pillars were induced to bond through process optimization.

• Proceedings of the Korean Society of Precision Engineering Conference
• /
• 2011.06a
• /
• pp.749-750
• /
• 2011

• Design & Manufacturing
• /
• v.13 no.4
• /
• pp.10-16
• /
• 2019

Semiconductor chip is bonded to the substrate by melting solder bumps. In general, the chip bonding is applied by a Reflow process or a Thermo-Compression(TC) bonding process. In this paper, we introduce a Laser Assisted Thermo-Compression bonding (LATCB) process to improve the anxiety of the existing process(Reflow, TC bonding). In the LATCB process, the chip is bonded to the substrate by irradiating a laser with a uniform energy density in the same area as the chip to melt only the solder bumps and press the chip with a Transparent Compression Module (TCM). The TCM consists of a fused silica header for penetrating the laser and pressurizing the chip, and a piezoelectric actuator (P.A.) coupled to both ends of the header for micro displacement control of the header. In addition, TCM is a structure that can pressurize the chip and deliver it to the chip and solder bumps without losing the energy of the laser. Fused silica, which is brittle, is vulnerable to deformation, so the header may be damaged when an external force is applied for pressurization or a displacement differenced is caused by piezoelectric actuators at both ends. On the other hand, in order to avoid interference between the header and the adjacent chip when pressing the chip using the TCM, the header has a notch at the bottom, and breakage due to stress concentration of the notch is expected. In this study, the thickness and notch length that the header does not break when the external force (500 N) is applied to both ends of the header are optimized using structural analysis and Coulomb-Mohr failure theory. In addition, the maximum displacement difference of the P.A.s at both ends where no break occurred in the header was derived. As a result, the thickness of the header is 11 mm, and the maximum displacement difference between both ends is 8 um.

• Journal of the Microelectronics and Packaging Society
• /
• v.21 no.1
• /
• pp.1-6
• /
• 2014

Flip chip bonded LED packages possess lower thermal resistance than wire bonded LED packages because of short thermal path. In this study, thermal and bonding properties of flip chip bonded high brightness LED were evaluated for Au-Sn thermo-compression bonded LEDs and Sn-Ag-Cu reflow bonded LEDs. For the Au-Sn thermo-compression bonding, bonding pressure and bonding temperature were 50 N and 300oC, respectively. For the SAC solder reflow bonding, peak temperature was $255^{\circ}C$ for 30 sec. The shear strength of the Au-Sn thermo-compression joint was $3508.5gf/mm^2$ and that of the SAC reflow joint was 5798.5 gf/mm. After the shear test, the fracture occurred at the isolation layer in the LED chip for both Au-Sn and SAC joints. Thermal resistance of Au-Sn sample was lower than that of SAC bonded sample due to the void formation in the SAC solder.

• Transactions of the Korean Society of Mechanical Engineers A
• /
• v.34 no.7
• /
• pp.929-933
• /
• 2010

Four-point bending tests were performed to investigate the interfacial adhesion of Cu-Cu bonding fabricated by thermo-compression process for three dimensional packaging. A pair of Cu-coated Si wafers was bonded under a pressure of 15 kN at $350^{\circ}C$ for 1 h, followed by post annealing at $350^{\circ}C$ for 1 h. The bonded wafers were diced into $30\;mm\;{\times}\;3\;mm$ pieces for the test. Each specimen had a $400-{\mu}m$-deep notch along the center. An optical inspection module was installed in the testing apparatus to observe crack initiation at the notch and crack propagation over the weak interface. The tests were performed under a fixed loading speed, and the corresponding load was measured. The measured interfacial adhesion energy of the Cu-to-Cu bonding was $9.75\;J/m^2$, and the delaminated interfaces were analyzed after the test. The surface analysis shows that the delamination occurred in the interface between $SiO_2$ and Ti.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.18 no.4
• /
• pp.175-182
• /
• 2017

In light emitting diode (LED) chip packaging, wire bonding is an important process that connects the LED chip on the lead frame pad with the Au wire and enables electrical operation for the next process. The wire bonding process is divided by two types: thermo compression bonding and ultrasonic bonding. Generally, the wire bonding process consists of three steps: 1st ball bonding that bonds the shape of the ball on the LED chip electrode, looping process that hangs the wire toward another connecting part with a loop shape, and 2nd stitch bonding that forms and bonds to another electrode. This study analyzed the factors affecting the LED die bonding processes to optimize the process capability that bonds a small Zener diode chip on the PLCC (plastic-leaded chip-carrier) LED package frame, and then applied response surface analysis. The design of experiment (DOE) was established considering the five factors, three levels, and four responses by analyzing the factors. As a result, the optimal conditions that meet all the response targets can be derived.

• Journal of the Microelectronics and Packaging Society
• /
• v.24 no.4
• /
• pp.9-17
• /
• 2017

In these days, MEMS (micro-electro-mechanical system) devices become the crucial sensor components in mobile devices, automobiles and several electronic consumer products. For MEMS devices, the packaging determines the performance, reliability, long-term stability and the total cost of the MEMS devices. Therefore, the packaging technology becomes a key issue for successful commercialization of MEMS devices. As the IoT and wearable devices are emerged as a future technology, the importance of the MEMS sensor keeps increasing. However, MEMS devices should meet several requirements such as ultra-miniaturization, low-power, low-cost as well as high performances and reliability. To meet those requirements, several innovative technologies are under development such as integration of MEMS and IC chip, TSV(through-silicon-via) technology and CMOS compatible MEMS fabrication. It is clear that MEMS packaging will be key technology in future MEMS. In this paper, we reviewed the recent development trends of the MEMS packaging. In particular, we discussed and reviewed the recent technology trends of the MEMS bonding technology, such as low temperature bonding, eutectic bonding and thermo-compression bonding.

• Journal of the Korean Society for Precision Engineering
• /
• v.31 no.10
• /
• pp.865-871
• /
• 2014

Paradigm shift to 3-D chip stacking in electronic packaging has induced a lot of integration challenges due to the reduction in wafer thickness and pitch size. This study presents a hybrid bonding technology by self-alignment effect in order to improve the flip chip bonding accuracy with ultra-thin wafer. Optimization of Cu pillar bump formation and evaluation of various factors on self-alignment effect was performed. As a result, highly-improved bonding accuracy of thin wafer with a $50{\mu}m$ of thickness was achieved without solder bridging or bump misalignment by applying reflow process after thermo-compression bonding process. Reflow process caused the inherently-misaligned micro-bump to be aligned due to the interface tension between Si die and solder bump. Control of solder bump volume with respect to the chip dimension was the critical factor for self-alignment effect. This study indicated that bump design for 3D packaging could be tuned for the improvement of micro-bonding quality.

• Journal of the Korean Society of Manufacturing Technology Engineers
• /
• v.23 no.4
• /
• pp.355-360
• /
• 2014

Recently, the use of LED is increasing. This paper presents the new package process of thermal compression bonding using metal layered LED chip for the high power LED device. Effective thermal dissipation, which is required in the high power LED device, is achieved by eutectic/flip chip bonding method using metal bond layer on a LED chip. In this study, the process condition for the LED eutectic die bonder system is proposed by using the analysis program, and some experimental results are compared with those obtained using a DST (Die Shear Tester) to illustrate the reliability of the proposed process condition. The cause of bonding failures in the proposed process is also investigated experimentally.