• 제목/요약/키워드: thermal stress device

검색결과 117건 처리시간 0.021초

고온 확산공정에 따른 산화막의 전기적 특성 (Electrical Characteristics of Oxide Layer Due to High Temperature Diffusion Process)

  • 홍능표;홍진웅
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제52권10호
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    • pp.451-457
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    • 2003
  • The silicon wafer is stable status at room temperature, but it is weak at high temperatures which is necessary for it to be fabricated into a power semiconductor device. During thermal diffusion processing, a high temperature produces a variety thermal stress to the wafer, resulting in device failure mode which can cause unwanted oxide charge or some defect. This disrupts the silicon crystal structure and permanently degrades the electrical and physical characteristics of the wafer. In this paper, the electrical characteristics of a single oxide layer due to high temperature diffusion process, wafer resistivity and thickness of polyback was researched. The oxide quality was examined through capacitance-voltage characteristics, defect density and BMD(Bulk Micro Defect) density. It will describe the capacitance-voltage characteristics of the single oxide layer by semiconductor process and device simulation.

리드 온 칩 패키징 기술을 이용하여 조립된 반도체 제품에서 패시베이션 파손을 막기 위한 본딩패드의 합리적 설계 (Optimum Design of Bonding Pads for Prevention of Passivation Damage in Semiconductor Devices Utilizing Lead-on-Chip (LOC) Die Attach Technique)

  • 이성민;김종범
    • 마이크로전자및패키징학회지
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    • 제15권2호
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    • pp.69-73
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    • 2008
  • 본 연구에서는 리드-온-칩 패키징 기술을 이용한 반도체 제품에서 디바이스의 패드의 위치가 온도변화로 인한 신뢰성 문제에 대단히 중요하다는 것을 보여준다. 컴퓨터를 이용한 이론적 계산 및 실험을 통해 패시베이션 파손으로 대변되는 신뢰성 문제가 디바이스의 코너 부위에 위치한 패턴에서 가장 심하게 발생할 수 있다는 것을 보여준다. 따라서, 패시베시션 파손 등으로 인한 디바이스의 신뢰성 저하를 예방하기 위해서는 취약한 패드 부위는 다바이스의 테두리 부위보다는 중앙부위에 위치하도록 설계하는 것이 바람직하다는 것을 본 연구에서는 지적하고 있다.

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GaAs MESFET의 온도변화에 다른 게이트 누설전류 특성 (Gate Leakage Current Characteristics of GaAs MESFETS′ with different Temperature)

  • 원창섭;김시한;안형근;한득영
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2001년도 하계학술대회 논문집
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    • pp.50-53
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    • 2001
  • In this study, gate leakage current mechanism has been analyzed for GaAs MESFET with different temperatures ranging from 27$^{\circ}C$ to 300$^{\circ}C$ . It is expected that the thermionic and field emission at the MS contact will dominate the current flow. Thermal cycle is applied to test the reliability of the device. From the results, it is proved that thermal stress gradually increases the gate leakage current at the same bias conditions and leads to the breakdown and failure mechanism which is critical in the field equipment. Finally the gate contact under the repeated thermal shock has been tested to check the quality of Schottky barrier and the current will be expressed in the analytical from to associate with the electrical characteristics of the device.

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Wafer-Level Packaged MEMS Resonators with a Highly Vacuum-Sensitive Quality Factor

  • Kang, Seok Jin;Moon, Young Soon;Son, Won Ho;Choi, Sie Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권5호
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    • pp.632-639
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    • 2014
  • Mechanical stress and the vacuum level are the two main factors dominating the quality factor of a resonator operated in the vacuum range 1 mTorr to 10 Torr. This means that if the quality factor of a resonator is very insensitive to the mechanical stress in the vacuum range, it is sensitive to mainly the ambient vacuum level. In this paper, a wafer-level packaged MEMS resonator with a highly vacuum-sensitive quality factor is presented. The proposed device is characterized by a package with out-of-plane symmetry and a suspending structure with only a single anchor. Out-of-plane symmetry helps prevent deformation of the packaged device due to thermal mismatch, and a single-clamped structure facilitates constraint-free displacement. As a result, the proposed device is very insensitive to mechanical stress and is sensitive to mainly the ambient vacuum level. The average quality factors of the devices packaged under pressures of 50, 100, and 200 mTorr were 4987, 3415, and 2127, respectively. The results demonstrated the high controllability of the quality factor by vacuum adjustment. The mechanical robustness of the quality factor was confirmed by comparing the quality factors before and after high-temperature storage. Furthermore, through more than 50 days of monitoring, the stability of the quality factor was also certified.

형상기억합금 수치해석을 위한 특성 실험 및 작동기 응용 (Experimental Test Numerical Simulation of SMA Characteristics and Device verification)

  • 김상헌;최현호;조맹효
    • 한국복합재료학회:학술대회논문집
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    • 한국복합재료학회 2005년도 추계학술발표대회 논문집
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    • pp.145-148
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    • 2005
  • In this study, adaptation of two-way shape memory effect of SMA wire to the actuator is examined . Therefore the SMA characteristics which are training, material properties, response time at different thermal cycling rates are tested. During training, permanent deformation is accumulated till a certain number of cycle and then saturated. The amow1t of two-way strain is unchangeable over all cycle and the slope of strain(or stress)-temperature curve is slower as the increase of applied stress. The rate effect is observed resulted from the thermal distribution which heating profile differs from cooling as thermal cycling time. Using the estimated SMA properties, an experimental test for the simple smart wing is performed.

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TSV 기반 3차원 소자의 열적-기계적 신뢰성 (Thermo-Mechanical Reliability of TSV based 3D-IC)

  • 윤태식;김택수
    • 마이크로전자및패키징학회지
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    • 제24권1호
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    • pp.35-43
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    • 2017
  • The three-dimensional integrated circuit (3D-IC) is a general trend for the miniaturized and high-performance electronic devices. The through-silicon-via (TSV) is the advanced interconnection method to achieve 3D integration, which uses vertical metal via through silicon substrate. However, the TSV based 3D-IC undergoes severe thermo-mechanical stress due to the CTE (coefficient of thermal expansion) mismatch between via and silicon. The thermo-mechanical stress induces mechanical failure on silicon and silicon-via interface, which reduces the device reliability. In this paper, the thermo-mechanical reliability of TSV based 3D-IC is reviewed in terms of mechanical fracture, heat conduction, and material characteristic. Furthermore, the state of the art via-level and package-level design techniques are introduced to improve the reliability of TSV based 3D-IC.

유동 불균일이 전열관 튜브에 미치는 영향 (Influence on heat transfer due to uneven flow)

  • 정재헌;송정일
    • 한국태양에너지학회:학술대회논문집
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    • 한국태양에너지학회 2008년도 추계학술발표대회 논문집
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    • pp.273-279
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    • 2008
  • The purpose of this study is not only to evaluate thermal performance but also to find the stress behavior of heat transfer tubes under the part load operation in Heat Recovery Steam Generator. Flow analysis was performed to know the behavior of exhaust gas from gas turbine and thermal performance was calculated using distribution of hot exhaust velocity. In addition, tubes temperature during operation were gathered from actual plant to verify the uneven flow distribution under part load operation. Stress analysis was performed using tubes temperature data gathered from actual plant under both part and full load operations to know the stress behavior of tubes.

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AC4C와 AC7A 주조재의 열변형 수치해석적 연구 (Numerical Study on Thermal Deformation of AC4C and AC7A Casting Material)

  • 윤희성;오율권
    • 한국생산제조학회지
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    • 제20권5호
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    • pp.541-546
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    • 2011
  • This study was numerically investigated on thermal deformation of AC4C and AC7A aluminum alloy casting material for manufacturing the automobile tire mold. The metal casting device was used in order to manufacture the mold product of automobile tire at the actual industrial field. The temperature distribution and the cooling time of these materials were numerically calculated by finite element analysis. Thermal deformation with stress distribution was also calculated form the temperature distribution results. The thermal deformation was closely related to the temperature difference between the surface and inside of the casting. As shown by numerical analysis result, the thermal deformation of AC7A casting material became higher than AC4C casting material. In addition, the results of displacement and stress distributions appeared to be larger at the center parts of casting than on its sides because of the shrinkage caused by the cooling speed difference.

평판형 고체산화물 연료전지 표면균열거동에 관한 수치해석 (The Numerical Analysis for the Surface Crack Behavior in the Planar Solid Oxide Fuel Cell)

  • 박철준;권오헌;강지웅
    • 한국안전학회지
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    • 제33권5호
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    • pp.1-8
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    • 2018
  • A fuel cell is an energy conversion device that converts a chemical energy directly into an electrical energy and has higher energy efficiency than an internal combustion engine, but solid oxide fuel cell (SOFC) consisting of brittle ceramic material remains as a major issue regarding the mechanical properties as the crack formation and propagation. In this study, the stress distribution and crack behavior around the crack tip were evaluated, due to investigated the effects of the surface crack at the operating condition of high temperature. As a result, the difference of the generated stress was insignificant at operating conditions of high temperature according to the surface crack length changes. This is because, the high stiffness interconnect has a closed structure to suppress cell deformation about thermal expansion. The stress intensity factor ratio $K_{II}/K_I$ increased as the crack depth increased, at that time the effect of $K_{II}$ is larger than that of $K_I$. Also the maximum stress intensity factor increased as the crack depth increased, but the location of crack was generated at the electrolyte/anode interface, not at the crack tip.

OLED소자의 수명에 미치는 다층 보호막의 영향 (The Effect of Multilayer Passivation Film on Life Time Characteristics of OLED Device)

  • 주성후;양재웅
    • 한국표면공학회지
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    • 제45권1호
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    • pp.20-24
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    • 2012
  • Multilayer passivation film on OLED with organic/inorganic hybrid structure as to diminish the thermal stress and expansion was researched to protect device from the direct damage of $O_2$ and $H_2O$ and improve life time characteristics. Red OLED doped with 1 vol.% Rubrene in $Alq_3$ was used as a basic device. The films consist of ITO(150 nm)/ELM200_HIL(50 nm)/ELM002_HTL(30 nm)/$Alq_3$: 1 vol.% Rubrene(30 nm)/$Alq_3$(30 nm) and LiF(0.7 nm)/Al(100 nm) which were formed in that order. Using LiF/$SiN_x$ as a buffer layer was determined because it significantly improved life time characteristics without suffering damage in the process of forming passivation film. Multilayer passivation film on buffer layer didn't produce much change in current efficiency, while the half life time at 1,000 $cd/m^2$ of OLED/LiF/$SiN_x$/E1/$SiN_x$ was 710 hours which showed about 1.5 times longer than OLED/LiF/$SiN_x$/E1 with 498 hours. futhermore, OLED/LiF/$SiN_x$/E1/$SiN_x$/E1/$SiN_x$ with 1301 hours showed about twice than OLED/LiF/$SiN_x$/E1/$SiN_x$ which demonstrated that superior characteristics of life time was obtained in multilayer passivation film. Through the above result, it was suggested using LiF/$SiN_x$ as a buffer layer could reduce the damage from the difference of thermal expansion coefficient in OLED with protective films, and epoxy layer in multilayer passivation film could function like a buffer between $SiN_x$ inorganic layers with relatively large thermal stress.