• Journal of the Korean Society for Precision Engineering
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• v.20 no.10
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• pp.183-190
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• 2003

Major device failures such as die cracking, interfacial delamination and warpage in flip chip packages are due to excessive heat and thermal gradients- There have been significant researches toward understanding the thermal performance of electronic packages, but the majority of these studies do not take into account the combined effects of thermo-mechanical interactions of the different package constituents. This paper investigates the thermo-mechanical performance of flip chip package constituents based on the finite element method with thermo-mechanically coupled elements. Delaminations with different lengths between the silicon die and underfill resin interfaces were introduced to simulate the defects induced during the assembly processes. The temperature gradient fields and the corresponding stress distributions were analyzed and the results were compared with isothermal case. Parametric studies have been conducted with varying thermal conductivities of the package components, substrate board configurations. Compared with the uniform temperature distribution model, the model considering the temperature gradients provided more accurate stress profiles in the solder interconnections and underfill fillet. The packages with prescribed delaminations resulted in significant changes in stress in the solder. From the parametric study, the coefficients of thermal expansion and the package configurations played significant roles in determining the stress level over the entire package, although they showed little influence on stresses profile within the individual components. These observations have been implemented to the multi-board layer chip scale packages (CSP), and its results are discussed.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.5
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• pp.410-414
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• 2013

Rapid thermal processing (RTP) abruptly decreases the time required to perform solar cell processes. RTP were used to form emitter of crystalline silicon solar cells. The emitter sheet resistance is studied as a function of time and temperature. The objective of this study is reduction of doping process time with same performance. Emitter difRapid thermal dfusion was carried out by using a spin on doping and a RTP. iffusion was performed in the temperature range of $700{\sim}750^{\circ}C$ for 1m 30s~15 m. Thermal budgets yielded a $50{\Omega}/sq$ emitter using a P509 source. To reduce process time and get high efficiency, rapid thermal diffusion by IR lamp was employed in air atmosphere at $700^{\circ}C$ for 15 m.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.12
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• pp.965-971
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• 2001

$\beta$-Ga$_2$O$_3$ nanobelts and nanoparticles were synthesized from mechanically ground GaN powders with thermal annealing in a nitrogen atmosphere and an oxygen atmosphere, respectively. The study of field emission scanning electron microscopy (FESEM) on the microstructures of nanomaterials revealed that the nanobelts synthesized in the nitrogen atmosphere are with the range of 20~1000nm width and 10 ~100nm thickness, and that nanomaterials are nanoparticles with 20~50nm radius obtained by thermal annealing in an oxygen atmosphere. The crystal structure of the $\beta$-Ga$_2$O$_3$ nanobelts and nanoparticles was in this study investigated by X-ray diffractometer (XRD) and high-resolution transmission electron microscope (HRTEM). The formation processes of the nanobelts and nanoparticles will be discussed in this paper.

• Journal of Welding and Joining
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• v.28 no.1
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• pp.54-59
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• 2010

Ship Blocks are assembled by welding, and among them, welding between large blocks (Pre-erection stage) is used as feature of butt. In this process, local material has a experience of thermal cycle and become finally shrunk. As for inconsistency of shrunk weldments and adjacent regions, ship structure would be deformed locally and globally. Thermal distortion analyses are done for control of these processes, and methodologies capable of ship block size among them are using 2-D shell element in FEM. A shell element takes charge of plate, so it has its thickness which is important for angular distortion by welding. By the way, a butt-welding consists normally of several passes, and weldment thickness are different at each pass. If a calculated final one-time welding shrinkage is acting on the shell element whose thickness is same as it of plate, then deformation value must be underestimated. This research developed a methodology that total deformation after multi-pass welding can be analyzed by one time at shell element having original thickness of its plate. We use the SDB thermal distortion analysis method and verified by several experiment. The both experimental and analysis results showed good agreements.

• Journal of Power Electronics
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• v.16 no.6
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• pp.2085-2098
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• 2016

Laminated busbars with a low stray inductance are widely used in NPC three-level inverters, even though some of them have poor performances in heat equilibrium and overvoltage suppression. Therefore, a theoretical method is in need to establish an accurate mathematical model of laminated busbars and to calculate the impedance and stray inductance of each commutation loop to improve the heat equilibrium and overvoltage suppression performance. Firstly, an equivalent circuit of a NPC three-level inverter laminated busbar was built with an analysis of the commutation processes. Secondly, on the basis of a 3D (three dimensional) cubical thermal model and mirror circulation theory, a supersymmetric mirror circulation 3D cubical thermal model was built. Based on this, the laminated busbar was decomposed in 3D space to calculate the equivalent resistance and stray inductance in each commutation loop. Finally, the model and analysis results were put into a busbar design, simulation and experiments, whose results demonstrate the accuracy and feasibility of the proposed method.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.20 no.6
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• pp.2046-2056
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• 1996

The constrained melting inside an isothermally heated horizontal cylinder has been repeatedly investigated in many studies only for the moderate Rayleigh numbers. This study extends the range of Rayleigh numbers to systematically investigate the transition during melting processes, especially focusing on the complex multi-cellular flow pattern and thermal instability. The enthalpy-porosity formulation, with appropriate source terms to account for the phase change, is employed. For low Rayleigh numbers, initially developed single-cell base flow keeps the flow stable. For moderate Rayleigh numbers, even small disturbances in balance between thermal buoyance force and viscous force result in branched flow structure. For high Rayleight numbers, Benard type convection is found to develop within a narrow gap between thee wall and the unmelted solid. The marginal Rayleigh number and the corresponding wave number are in excellent agreement with those from linear stability theory.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.28 no.5
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• pp.532-538
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• 2004

MEMS technology applying to the sensors and micro-electro devices is complete system. These microsystems are made by variable processes. Especially, the mentallization process has very important functions to transfer the power operating the sensor and signal induced from sensor part. But in the structures of MEMS the local stress concentration and deformation are often yielded by an irregular geometrical shape and different constraint. Therefore, this paper studies the effect of supporting type and thickness ratio about thin film of the substrate on the residual stress variation when the thermal loads is applied to the multi-layer thin film fabricated by metallization process. Specimens were made from several materials such as Al, Au and Cu. Then, uniform thermal load was applied, repeatedly. The residual stress was measured by FE Analysis and nano-indentation method using AFM. Generally, the specimen made of Al induced the larger residual stress than that of made of other materials. Specimen made of Cu and Au having the low thermal expansion coefficient induces the minimum residual stress. Similarly, the lowest indentation length was measured by nano-indentation method in the Si/Au/Cu specimen. Particularly, clusters are created in the specimen made of Cu by thermal load and the indentation length became increasingly large by cluster formation.

• Journal of the Semiconductor & Display Technology
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• v.4 no.2 s.11
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• pp.7-10
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• 2005

[ $SiO_{2}$ ] or SiON is usually deposited and annealed after formation of silicide in real transistor fabrication processes. Nickel silicide and nickel silicide with Co interlayer were annealed at 650$^{\circ}C$ for 30 min with silica top layer in this study to investigate its thermal stability. SEM, XPS, and FPP(four point probe) were employed for the investigation. Nickel silicide with Co interlayer showed improved thermal stability. Co interlayer seems to play a key role to the stability of nickel silicide.

• Journal of the Optical Society of Korea
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• v.18 no.1
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• pp.71-77
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• 2014

We present design and fabrication of a multi-focusing microlens array (MLA) using a thermal reflow method. To obtain multi-focusing properties with different numerical apertures at the elemental lens of the MLA, double-cylinder photoresist (PR) structures with different diameters were made within the guiding pattern with both photolithographic and partial developing processes. Due to the base PR layer supporting the thermal reflow process and the guiding structure, the thermally reflowed PR structure had different radii of curvatures with lens shapes that could be precisely modeled by the initial volume of the double-cylinder PR structures. Using the PR template, the hexagonally packed multi-focusing MLA was made via the replica molding method, which showed four different focal lengths of 0.9 mm, 1.1 mm, 1.6 mm, and 2.5 mm, and four different numerical apertures of 0.1799, 0.2783, 0.3973, and 0.4775.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.33 no.4
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• pp.286-290
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• 2020

The formation of inorganic thin films in low-temperature solution processes is necessary for a wide range of commercial applications of organic electronic devices. Aluminum oxide thin films can be utilized as barrier films that prevent the deterioration of an electronic device due to moisture and oxygen in the air. In addition, they can be used as the gate insulating layers of a thin film transistor. In this study, aluminum oxide thin film were formed using two methods simultaneously, a thermal process and the DUV process, and the properties of the thin films were compared. The result of converting aluminum nitrate hydrate to aluminum oxide through a hybrid process using a thermal treatment and DUV was confirmed by XPS measurements. A film-based a-IGZO TFT was fabricated using the formed inorganic thin film as a gate insulating film to confirm its properties.