• Journal of IKEEE
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• v.18 no.3
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• pp.335-340
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• 2014

Recently, LED (Light Emitting Diode) becomes to be useful to apply for the lightening sources in electric systems and the lightening equipment since the power is less consumed with high efficiency, and the size and the weight of LED are small and light, respectively. The LED is controlled with constant current and SMPS (Switching Mode Power Supply). It is necessary for the LED manufacturer to secure the fundamental technology of designing LED chip, and to study the methodology to improve the power factor (PF) and to design the operational circuit for the development of LED to reduce the power loss in the application of LED lightening. The direct AC (Alternating Current) LED driving circuit, HV9910, is widely used in the industry field. In this paper, it is to evaluate the improved methodology for the power factor and efficiency through simulations when PFC (Power Factor Correction) and Noise Filter are added to HV9910.

• Journal of the Korea Computer Industry Society
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• v.2 no.8
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• pp.1055-1062
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• 2001

Study, it is the purpose to develope a cheap and compact pulsed $CO_2$ laser with pulse repetition rate range of 1 KHz. We used a IGBT switched power supply as a power supply, which is cheap and simple comparing to others. PIC one-chip microprocessor was used for precise control of a laser power supply on the control part. And the laser cavity was fabricated as an axial and water cooled type. The laser performance characteristics as various parameters, such as pulse repetition rate, gas pressure, and gas mixture rate have been investigated. The experiment was done under the condition of total pressure of $CO_2$： $N_2$：He ＝ 1：3：10, 1：1.5：5, 1：9：15 from 6 Torr to 15 Torr and pulse repetition rate from 100 Hz to 900 Hz. As a result, the maximum average outpu was about 20.5 W at the total pressure of 15 Torr, the gas mixture $CO_2$：$N_2$：He ＝ 1：9：15 and the pulse repetition rate of 700 Hz.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.1
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• pp.7-15
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• 2002

This paper is concerned with remote environment monitoring & control for the breeding house as scattering far and wide. The environment data is detected in the breeding house that is collected to one processor. It's adapted to the PSTN(public switch tele-phone network) and multi-processing for exchange the environment data and the control data in between the manager and a breeding house by micro-processor. We have designed the algorithm of the communication sequence through the experimental research. This system is composed of sensor interface, FSK communications, LED display, data latch and MCS-51 single-chip. The S/W is composed with data acquisition by multi-processing, data communication and interrupt. And this paper is Proposed the DB structure algorithm concern to a mount scale using web design. The subject is a performance of effective management for the breeding house.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.17 no.5
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• pp.128-134
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• 2018

In this paper, two ports feeding a microstrip patch antenna using a quadrature hybrid circuit was proposed to enhance the bandwidth for the global positioning system(GPS). The square patch was designed, and the probe feeding was applied. The quadrature hybrid chip circuit for two-port feeding was designed, and output ports that have a 90-degree phase difference feed to the patch antenna. The designed patch and quadrature hybrid circuit were implemented on an FR4 board, and were combined. The measurement of the bandwidth within a voltage standing wave ratio(VSWR) of 2:1 and axial ratio(AR) in 3dB were wide band as 29% BW (1,230~1,700 MHz) and 15.87% BW (1,400~1,650 MHz), respectively. Antenna gain were measured 2.75dBi at the center frequency.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.12
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• pp.61-68
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• 2004

Wireless mobile communication systems request high speed mobility and high speed data transmission capability. In order to meet the requirements, OFDM(Orthogonal Frequency Division Multiplex) is mainly adopted in the physical layer of the wireless systems. In commercial wireless mobile systems, IEEE802.(11a, 16e, etc) series seem to be used as the modulation method. For supporting multiple air-interfaces in a wireless mobile system, different kinds of OFDM based modulation methods should be supported in one modem chip. It requires a variable point IFFT/FFT or reconfigurable IFFT/FFT processor. In this paper, we propose the design method of a reconfigurable IFFT/FFT processor. In addition, it is shown that a reconfigurable IFFT/FFT processor can he implemented by using the proposed method.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.1
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• pp.69-78
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• 2010

To implement the high performance SoC, we propose the flying master bus architecture that a specially defined master named as the flying master directly accesses the selected slaves with no regard to the bus protocol. The proposed bus architecture was implemented through Verilog and mapped the design into Hynix 0.18um technology. As master and slave wrappers have around 150 logic gate counts, the area overhead is still small considering the typical area of modules in SoC designs. In TLM performance simulation about proposed architecture, 25~40% of transaction cycle and 43~60% of bus efficiency are increased and 43~77% of request cycle is decreased, compared with conventional bus architecture. Conclusively, we assume that the proposed flying master bus architecture is promising as the leading candidate of the bus architecture in the aspect of performance and efficiency.

• Information and Communications Magazine
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• v.9 no.9
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• pp.72-85
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• 1992

The throughput requirement for many digital signal processing is such that multiple processing units are essential for real-time implementation. Advances in VLSI technology make it feasible to design and implement computer systems consisting of a large number of function units. The research on a very high throughput VLSI architecture for digital signal processing applications requires the development of an algorithm, decomposition scheme which can minimize data communication requirements as well as minimize computational complexity. The objectives of the research are to investigate computationally efficient algorithms for solution of the class of problems which can be modeled as DLSI systems or adaptive system, and develop VLSI architectures and associated multiprocessor systems which can be used to implement these algorithms in real-time. A new VLSI architecture for real-time 2-D digital signal processing applications is proposed in this research. This VLSI architecture extends the concept of having a single processing units in a chip. Because this VLSI architecture has the advantage that the complexity and the number of computations per input does not increase as the size of the input data in increased, it can process very large 2-D date in near real-time.

• Journal of the Korea Society of Computer and Information
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• v.17 no.4
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• pp.1-9
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• 2012

As we are turnning into the aged society, accidents by falling down are increasing in the aged people's group. In this paper, we design the system with the 3-Axis acceleration sensor which is composed by a single chip. The body activity signal is measured with the signal detector and RF communicator in this proposed system and the and falling by the entering signal pattern analysis with 3-Axis acceleration sensor. For the RF communication, we are using nRF24L01p and 8bits ATmega uC for the processor. The error of energy expenditure estimation between motor driven treadmill and proposed a body activity module was 7.8% respectively. Human activities and falling is monitored according to analyze and judge the critical value of the Signal Vector. as falled down if they don't turn off the alarm after specific period and the aged person's after falling down activities are their position and more.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.48 no.2
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• pp.15-21
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• 2011

In this paper, an energy management circuit for solar energy harvesting system is designed in $0.35{\mu}m$ CMOS technology. The solar energy management system consists of an ISC(Integrated Solar Cell), a voltage booster, and an MPPT(Maximum Power Point Tracker) control unit. The ISC generates an open circuit voltage of 0.5V and a short circuit current of $15{\mu}A$. The voltage booster provides the following circuit with a supply voltage about 1.5V. The MPPT control unit turns on the pMOS switch to provide the load with power while the ISC operates at MPP. The SEMU(Solar Energy Management Unit) area is $360{\mu}m{\times}490{\mu}m$ including pads. The ISC area is $500{\mu}m{\times}2000{\mu}m$. Experimental results show that the designed SEMU performs proper MPPT control for solar energy harvested from the ISC. The measured MPP voltage range is about 370mV∼420mV.

• Journal of the Korea Organic Resources Recycling Association
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• v.8 no.4
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• pp.129-137
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• 2000

In this study, biological treatment process of MWWT(Municipal wet-waste Treatment) has been developed through a moduling of the containerized closed ATAD(Auto thermal aerobic digestion) system & closed vertical dynamic acerator, which were used for food waste and cattle manure, respectively. Though biological process has several advantages such as low concentrations of heavy metals and salts, proper and stable C/N ratio and constant reaction rate against the process treating two wastes separately, it has a obstacles of salt concentration and much usage of bulking agent such as wood chip. After rapid oxidation in the boxed tower reactor for 5 days, the content of sewage sludge would be reduced 65% on around, might be mixed with the food waste that had been treated in the static closed reactor during 6 days and put in the secondary static reactor for curing. During composting process, the odor contained in the gas generated from the reactor was removed by passing it through a biofilter as well as the leachate was treated in the wastewater treatment facility. Consequently, it seemed to be possible to compost sewage sludge at mild and stable operating condition and at low cost through the biological ATAD process resulting in the production of organic compost satisfying the specifications regulated by itself.