• Title/Summary/Keyword: system on chip design

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A DESIGN STUDY OF THB 400MHZ WIDE-BAND DIGITAL AUTOCORRELATION SPECTROMETER (400MHz 광대역 디지털 자기상관분광기 설계연구)

  • 이창훈;김광동;한석태;김태성;최한규;변도영;구본철
    • Journal of Astronomy and Space Sciences
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    • v.19 no.4
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    • pp.327-340
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    • 2002
  • In this paper, we performed the design study of a wide-band digital autocorrelation spectrometer for the observation study of an extra-galaxy's spectral lines and the survey research of the special radio sources in field of the radio astronomy observational research. The autocorrelation spectrometer designed in this paper can be used to their spectrometer of any system because this spectrometer has a wide dynamic power and frequency range properties. In this system we use the aliasing sampling method to minimize the band loss. For the output signal of the correlator we can increase the signal processing speed using by a special DSP chip, the integration and the FFT using hardware, so this spectrometer can support the newest developed technique for the radio astronomy observation so called “On the fly” method.

The design and development of Control/Storage and TRX Module for Small Satellite Synthetic Aperture Radar Application (초소형위성 영상레이다를 위한 제어/저장 및 송수신 모듈의 설계 및 제작)

  • Lee, Juyoung;Kim, Hyunchul;Kim, Jongpil;Yu, Kyungdeok;Kim, Dongsik
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.22 no.6
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    • pp.31-36
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    • 2022
  • In this paper, we present the design, manufacture and test results of Backend unit for SAR(Synthetic Aperture Radar) that can be applied on a small satellite. The Backend unit for SAR was designed with a control/storage board, TRX(transmission and receiving) board and a power supply board as a single unit in consideration of the applying of a small satellite. The control/storage board uses RFSoC to generate wideband chirp signal, generate operating timings, and perform control and calculations for SAR operation. The TRX board is designed to convert the wideband chirp signal generated by the control/storage board to the operating frequency of X-band by up-converting the frequency. Since small size, light weight, and low cost are important consideration for small satellite, MIL/Industrial grade components were appropriately applied and the at the same time it was designed to ensure mission life through the radiation test, analysis and space environment tests.

A UTMI-Compatible USB2.0 Transceiver Chip Design (UTMI 표준에 부합하는 USB2.0 송수신기 칩 설계)

  • Nam Jang-Jin;Kim Bong-Jin;Park Hong-June
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.5 s.335
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    • pp.31-38
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    • 2005
  • The architecture and the implementation details of a UTMI(USB2.0 Transceiver Macrocell Interface) compatible USB2.0 transceiver chip were presented. To confirm the validation of the incoming data in noisy channel environment, a squelch state detector and a current mode Schmitt-trigger circuit were proposed. A current mode output driver to transmit 480Mbps data on the USB cable was designed and an on-die termination(ODT) which is controlled by a replica bias circuit was presented. In the USB system using plesiochronous clocking, to compensate for the frequency difference between a transmitter and a receiver, a synchronizer using clock data recovery circuit and FIFO was designed. The USB cable was modeled as the lossy transmission line model(W model) for circuit simulation by using a network analyzer measurements. The USB2.0 PHY chip was implemented by using 0.25um CMOS process and test results were presented. The core area excluding the IO pads was $0.91{\times}1.82mm^2$. The power consumptions at the supply voltage of 2.5V were 245mW and 150mW for high-speed and full-speed operations, respectively.

Design of a Small Area 12-bit 300MSPS CMOS D/A Converter for Display Systems (디스플레이 시스템을 위한 소면적 12-bit 300MSPS CMOS D/A 변환기의 설계)

  • Shin, Seung-Chul;Moon, Jun-Ho;Song, Min-Kyu
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.4
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    • pp.1-9
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    • 2009
  • In this paper, a small area 12-bit 300MSPS CMOS Digital-to-Analog Converter(DAC) is proposed for display systems. The architecture of the DAC is based on a current steering 6+6 segmented type, which reduces non-linearity error and other secondary effects. In order to improve the linearity and glitch noise, an analog current cell using monitoring bias circuit is designed. For the purpose of reducing chip area and power dissipation, furthermore, a noble self-clocked switching logic is proposed. To verify the performance, it is fabricated with $0.13{\mu}m$ thick-gate 1-poly 6-metal N-well Samsung CMOS technology. The effective chip area is $0.26mm^2$ ($510{\mu}m{\times}510{\mu}m$) with 100mW power consumption. The measured INL (Integrated Non Linearity) and DNL (Differential Non Linearity) are within ${\pm}3LSB$ and ${\pm}1LSB$, respectively. The measured SFDR is about 70dB, when the input frequency is 15MHz at 300MHz clock frequency.

IC Thermal Management Using Microchannel Liquid Cooling Structure with Various Metal Bumps (금속 범프와 마이크로 채널 액체 냉각 구조를 이용한 소자의 열 관리 연구)

  • Won, Yonghyun;Kim, Sungdong;Kim, Sarah Eunkyung
    • Journal of the Microelectronics and Packaging Society
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    • v.23 no.2
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    • pp.73-78
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    • 2016
  • An increase in the transistor density of integrated circuit devices leads to a very high increase in heat dissipation density, which causes a long-term reliability and various thermal problems in microelectronics. In this study, liquid cooling method was investigated using straight microchannels with various metal bumps. Microchannels were fabricated on Si wafer using deep reactive ion etching (DRIE), and Ag, Cu, or Cr/Au/Cu metal bumps were placed on Si wafer by a screen printing method. The surface temperature of liquid cooling structures with various metal bumps was measured by infrared (IR) microscopy. For liquid cooling with Cr/Au/Cu bumps, the surface temperature difference before and after liquid cooling was $45.2^{\circ}C$ and the power density drop was $2.8W/cm^2$ at $200^{\circ}C$ heating temperature.

Design and Implementation of an Around-View Monitoring system of Smart User Interface based on Windows O/S (Windows 운영체제 기반 어라운드 뷰 모니터링 시스템의 스마트 사용자 인터페이스 설계 및 구현)

  • Cheon, Seung-hwan;Jang, Si-woong
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.10a
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    • pp.427-430
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    • 2012
  • 최근 차량용 블랙박스, 자동 운전 시스템, 어라운드 뷰 시스템 등과 같은 운전자의 편의와 안전을 위한 장치 및 시스템들이 개발되고 있다. 현재 운전자를 위한 보조 시스템으로 구글(google)의 자동 운전 시스템(Auto Car Driving System)과 현대 모비스(hyundai mobis)의 AVM 시스템(Around View Monitoring System) 등의 다양한 차량용 편의장치 시스템들이 등장했다. 위와 같은 다양한 ECU들을 관리하기 위한 서버 및 저장 장치 역할을 할 수 있는 고사양의 Car PC의 장착이 필수적이다. 기존의 AVM 시스템은 차량 주변을 실시간으로 제공하기 위해 임베디드 또는 별도의 차량용 네트워크를 통해 임베디드 시스템 또는 SoC(System On Chip)형태의 하드웨어 기반으로 개발되고 있다. 하지만 고사양의 Car PC 기반에서는 별도의 비용없이 소프트웨어로 구현이 가능하다. 본 논문에서는 차량의 전 후 좌 우에 장착된 4대의 카메라로부터 입력된 차량 주변 상황을 한눈에 보여주는 AVM 시스템(Around-View Monitoring System)을 위한 카메라 보정 및 정합 처리 모듈 및 AVM 시스템을 Windows를 O/S로 하는 PC 내부에서 기존의 AVM 시스템을 이용하여 화면에 전 후 좌 우 버튼을 각각 만들어 버튼을 터치했을 때, 각 버튼에 해당되는 영상이 AVM 시스템과 함께 출력되도록 하거나 디스플레이에 Full 버전으로 출력되도록 S-UI(Smart User Interface)를 설계 및 구현한다. 제안하는 AVM 시스템과 기존의 AVM 시스템의 성능과 기능을 비교 분석함으로써 제안하는 영상 처리 모듈을 이용하여 추가 비용이 발생하지 않는 AVM 시스템의 구현 가능성을 검증한다.

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A Design and Implementation of the Real-Time MPEG-1 Audio Encoder (실시간 MPEG-1 오디오 인코더의 설계 및 구현)

  • 전기용;이동호;조성호
    • Journal of Broadcast Engineering
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    • v.2 no.1
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    • pp.8-15
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    • 1997
  • In this paper, a real-time operating Motion Picture Experts Group-1 (MPEG-1) audio encoder system is implemented using a TMS320C31 Digital Signal Processor (DSP) chip. The basic operation of the MPEG-1 audio encoder algorithm based on audio layer-2 and psychoacoustic model-1 is first verified by C-language. It is then realized using the Texas Instruments (Tl) assembly in order to reduce the overall execution time. Finally, the actual BSP circuit board for the encoder system is designed and implemented. In the system, the side-modules such as the analog-to-digital converter (ADC) control, the input/output (I/O) control, the bit-stream transmission from the DSP board to the PC and so on, are utilized with a field programmable gate array (FPGA) using very high speed hardware description language (VHDL) codes. The complete encoder system is able to process the stereo audio signal in real-time at the sampling frequency 48 kHz, and produces the encoded bit-stream with the bit-rate 192 kbps. The real-time operation capability of the encoder system and the good quality of the decoded sound are also confirmed using various types of actual stereo audio signals.

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The Design and Characteristic Analysis of a Digital Signal Transmission System Based on Power Line Communications

  • Kim, Ji-Hyoung;Yun, Ji-Hun;Kim, Yong-K.;So, Byung-Moon
    • Transactions on Electrical and Electronic Materials
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    • v.10 no.6
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    • pp.222-226
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    • 2009
  • The objective of this study is to share multimedia contents included in existing digital devices and to solve the problems of an increase in installation fees and non-environmentally friendly interiors. This study designed a new digital signal transmitter and receiver using power line transmission and HDMI in order to solve the problems in the existing systems. The transmitter and receiver designed in this study used an AD9867BCPZ PLC chip in which the transmission came from digital signals originating in a PC, and the system architecture was configured so that the outputs signals were connected to a TV from the receiver. The experiment was implemented by adding a Video Test Generator, a USBPre external sound card, and Smaart Live 6 for analyzing the characteristics of the configured system. In the video test results, it was verified that communication was actively implemented, and the image quality showed a constant level from the measurement of the captured video. In the case of the sound, it was verified that more than 90% of the sound signals were normally transmitted and received from the examination of their phases and magnitudes. Thus, the performance of the system designed in this study was verified, which leads to the resolution of some of the problems found in current digital devices.

A Study on the High Speed Communication Interface with Virtual Modem (가상 모뎀과의 고속 인터페이스구조에 관한 연구)

  • Song, Tae-Hoon;Song, Moon-Vin;Chung, Yun-Mo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.1
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    • pp.84-89
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    • 2007
  • In order to design and test an SoC modem for high speed communication, the platform with the architecture of such high speed communication is needed. That platform is needed for testing large data in speed of 500Mbps. This paper shows that transmission data can be uploaded and downloaded by 250Mbps between a virtual modem target board and a PC through the AHB-PCI IP and the speed of based on DPRAM and PCI.

Study on the Design of a High Condensing LED Searchlight

  • Kim, Tae-Seong;Kim, Jin-Wook;Kim, Sun-Jae;Kil, Gyung-Suk
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.4
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    • pp.201-205
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    • 2015
  • This paper dealt with the condensing technology of an LED light source that uses a parabolic reflector to replace a searchlight equipped with a xenon lamp. A ray-tracing simulation was conducted to analyze the influence of the diameter of the reflector and the size of the light source on light condensing. The combination of a parabolic reflector with a diameter of 620 mm and a focal distance of 220 mm, and a 9 mm multi-chip package (MCP) with a luminous flux of 7,000 lm showed the narrowest beam angle. The luminous intensity at the center was measured at 7.7×106 cd. The distance between the light source and the point where the illuminance was 1 lx was calculated to be 2.8 km. The power consumption of the system was 95 W, which is only 9.5% of that of the 1 kW xenon searchlight, and the beam angle was 1.03°. In a site experiment, it was confirmed that the light ray reflected from the LED searchlight proceeds forward without any diffusion because of the narrow beam angle.