• Title/Summary/Keyword: system LSI

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A 1280-RGB $\times$ 800-Dot Driver based on 1:12 MUX for 16M-Color LTPS TFT-LCD Displays (16M-Color LTPS TFT-LCD 디스플레이 응용을 위한 1:12 MUX 기반의 1280-RGB $\times$ 800-Dot 드라이버)

  • Kim, Cha-Dong;Han, Jae-Yeol;Kim, Yong-Woo;Song, Nam-Jin;Ha, Min-Woo;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.1
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    • pp.98-106
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    • 2009
  • This work proposes a 1280-RGB $\times$ 800-Dot 70.78mW 0.l3um CMOS LCD driver IC (LDI) for high-performance 16M-color low temperature poly silicon (LTPS) thin film transistor liquid crystal display (TFT-LCD) systems such as ultra mobile PC (UMPC) and mobile applications simultaneously requiring high resolution, low power, and small size at high speed. The proposed LDI optimizes power consumption and chip area at high resolution based on a resistor-string based architecture. The single column driver employing a 1:12 MUX architecture drives 12 channels simultaneously to minimize chip area. The implemented class-AB amplifier achieves a rail-to-rail operation with high gain and low power while minimizing the effect of offset and output deviations for high definition. The supply- and temperature-insensitive current reference is implemented on chip with a small number of MOS transistors. A slew enhancement technique applicable to next-generation source drivers, not implemented on this prototype chip, is proposed to reduce power consumption further. The prototype LDI implemented in a 0.13um CMOS technology demonstrates a measured settling time of source driver amplifiers within 1.016us and 1.072us during high-to-low and low-to-high transitions, respectively. The output voltage of source drivers shows a maximum deviation of 11mV. The LDI with an active die area of $12,203um{\times}1500um$ consumes 70.78mW at 1.5V/5.5V.

External Force Control for Two Dimensional Contour Following ; Part 1. A Linear Control Approach

  • Park, Young-Chil;Kim, Sungkwun
    • 제어로봇시스템학회:학술대회논문집
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    • 1992.10b
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    • pp.130-134
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    • 1992
  • The ability of a robot system to comply to an environment via the control of tool-environment interaction force is of vital for the successful task accomplishment in many robot application. This paper presents the implementation of external force control for two dimensional contour following task using a commercial robot system. Force accommodation is used since a constraint imposed in our work is not to modify the commercial robot system. A linear, decoupled model of two dimensional contour following system in the discrete time domain is derived first. Then the experimental verification of linear control is obtained using a PUMA 560 manipulator with standard Unimation controller, Astek FS6-120A six axis wrist force sensor attached externally to the arm and LSI-11173 microcomputer. Experimentally obtained data shows that the RMS contact force error is 0.8246 N when following the straight edge and 2.3768 N when following 40 mm radius curved contour.

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LSMV Multi-level Inverter development and Application (LSMV 고압인버터 개발 및 현장 적용)

  • Kim, Hyo-Jin;Na, Seung-Ho;Kim, Kyeon-Seo
    • Proceedings of the KIPE Conference
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    • 2010.07a
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    • pp.311-313
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    • 2010
  • 에너지 고갈에 따른 대체 에너지 확립이 화두가 되고 있으며 대체 에너지에 대한 급속한 연구가 진행되고 있다. 이러한 연구가 중요함은 물론 현재, 사용하고 있는 에너지를 얼마나 효율적으로 쓸 것인가에 대해서 고민하고 있다. 기존 산업 시설에서는 에너지를 절감하기 위한 방법으로 저압의 산업 시설에서는 인버터를 적용하여 적게는 10%에서 70%까지에 에너지를 절감효과를 보고 있다. 하지만 고압의 대용량 설비 시설에서는 인버터가 적용된 비율이 채 10%가 넘지 않는다. 이러한 대용량 설비 기계 사용처에서 최근 에너지를 절감하기 방안으로 고압인버터를 적용하기 시작하여, 고압 인버터의 수요가 급속히 늘어나는 추세이다. 이러한 시장 동향을 파악하여 LSIS의 저압인버터의 기술을 바탕으로한 LSMV 고압인버터를 출시하게 되었다. 본 기술서에는 LSMV 시리즈의 특징과 산업 현장에 적용된 사례에 대해서 기술하고자 한다.

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A Study on Computer Aided VLSI System Design (VLSI System CAD에 관한 연구)

  • 박진수
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.8 no.1
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    • pp.30-37
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    • 1983
  • In this paper I have proposed a heuristic layout algorism which is important in the CAD system of VLSI. I have designed a placement algorism to be used the method which depends upon the synthetic judgment of human. The placement algorism can reflect the position of a module in a logical design circuit diagram drawn up by human beings. Also, in order to show the usefulness of the new method I have compared through a program experiment it with the former method of cluster development placement. Moreover, a routing algorism is proposed in order to reduce the excessive problem of memory capacity. Of course this new algorism compensates for the former Maze's defects.

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Development of Ultrasound B-scanner(I)-System and Analog Part- (초음파 B스캔너의 개발(I) -시스템 및 아나로그부분-)

  • 김진하;신동희
    • Journal of Biomedical Engineering Research
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    • v.5 no.1
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    • pp.77-84
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    • 1984
  • A prototype of a linear real-time ultrasound B-scanner has been developed which has an axial resolution of 1-2mm and lateral resolution of 2-3mm. In the actual hardware and software implementations of the B-scanner, the following features were emphasized; (1) a dynamic focusing to improve resolution; (2) signal processing to obtain low noise image; (3) various functions for the user's convenience' (4) simplification of the system by an extensive use of recently developed LSI's; (5) development of a prototype at the level of a commercial product. This paper reports the experimental results of the overall system and the design approach of the analog part. The work on the digital part of the B-scanner is reported in part (II) seperately.

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Proposal of Framing System Realization for Synchronization Stability Improvement (동기 안정도 개선을 위한 동기 시스템 장치화의 제안)

  • Lim, Joung-Suk;Yeom, Heung-Yeol;Chang, Dae-Ig;Rhee, Man-Young
    • Proceedings of the KIEE Conference
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    • 1988.07a
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    • pp.161-164
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    • 1988
  • The purpose of this paper is to propose a simple firmware realization of PCM framing system, which exploits LSI memories for performance improvement and hardware simplification. The proposed system simply consists of a tapped delay line for simultaneous observation of in framing-bits and ROM programmed sequence controller for framing process. Perpormance analyses are made in terms of misframe interval, sync-loss-detection time and reframe time. The proposed strategy proved to be significantly better in reframe time, stability and hardware implementation.

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On-time Production and Delivery Improvements through the Demand-Lot Pegging Framework for a Semiconductor Business (반도체 산업에서 생산용량을 고려한 오더-로트 페깅기반의 납기약속 방법의 정합성 향상에 대한 연구)

  • Seo, Jeong-Cheol;Bang, June-Young
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.37 no.4
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    • pp.126-133
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    • 2014
  • This paper addresses order-lot pegging issues in the supply chain of a semiconductor business. In such a semiconductor business (memory or system LSI) order-lot pegging issues are critical to achieving the goal of ATP (Available to Promise) and on-time production and delivery. However existing pegging system and researches do not consider capacity limit on bottleneck steps. This paper presents an order-lot pegging algorithm for assigning a lot to an order considering quality constraints of each lot and capacity of bottleneck steps along the entire FAB. As a result, a quick and accurate response can be provided to customer order enquiries and pegged lot lists for each promised orders can be shown transparently and short or late orders can be detected before fixing the order.

An Implementation of Hybrid-Simulation in Manufacturing Environments using Object-Oriented Methodology (객체지향 기법을 이용한 공장운용 환경 하에서의 혼합시뮬레이션 구현)

  • 김성식
    • Journal of the Korea Society for Simulation
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    • v.7 no.1
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    • pp.15-26
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    • 1998
  • In building a shell-based FMS, which is known as one of the top-down approaches in the field of factory automation, we may take a hybrid simulation into consideration. The modeling of a hybrid simulation consists of real physical entities, virtual simulation, and central clock algorithm, etc. to carry out the whole system operation. In this paper, we sow a way to construct a hybrid simulation software system in manufacturing environments. We bring in the object-oriented methodology in system design and it can contribute in dealing with a wide variety of production types and configurations. Some classes such as project, product, process, order, schedule, stage are defined. These are used and tested by implementing a specific LSI circuit assembly line process.

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The structure of ATM Switch with the Shared Buffer Memory and The Construction of Switching Network for Large Capacity ATM (대용량 ATM을 위한 공유 버퍼 메모리 스위치 구조 및 교환 망의 구성 방안)

  • 양충렬;김진태
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.1
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    • pp.80-90
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    • 1996
  • The efficienty of ATM is based on the statical multiplexing of fixed-length packets, which are called cells. The most important technical point for realizing ATM switching network is an arrangement of the buffers and switches. Current most ATM switching networks are being achieved by using the switching modules based on the unit switch of $8{\times}8$ 150Mb/s or $16{\times}16$ 150Mb/s, the unit switch of $32{\times}32$150Mb/s for a large scale system is under study in many countries. In this paper, we proposed a new $32{\times}32$(4.9Gb/s throughput) ATM switch using Shared buffer memory switch which provides superior traffic characteristics in the cell loss, delay and throughput performance and easy LSI(Large Scale Integrated circuit). We analytically estimated and simulated by computer the buffer size into it. We also proposed the configuration of the large capacity ATM switching network($M{\times}M$.M>1,000) consisting of multistage to improve the link speed by non-blocking.

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The implementation of a low-power-consumptive OFDM LSI for the high speed indoor wireless LAN (구내용 고속무선LAN설비를 위한 저전력형 OFDM LSI구현에 관한 연구)

  • 차재상;김성권
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.16 no.5
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    • pp.66-74
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    • 2002
  • OFDM(Orthogonal Frequency Division Multiplexing)is a one of the nst promising digital modulation techniques adapted for Digital audio broadcasting or Digital TV since it is very robust against multipath fading channels. From 1997, since the OFDM technique was considered as the physical layer standard for the high data rate wireless LAN systems in the 5㎓ band, related studies have been studied actively. The key element to implement high data rate wireless LAN system using OFDM technique are IFFT and FFT modules. In this paper, new IFFT and FFT module are designed and implemented using current cut circuit based on the matrix-rounding process for the low-power consumptive operation and high-speed data processing. In addition to, we certify the available operation of the rounded IFFT/FFT module in the AWGN channel by using the BER performance simulation of IEEE 802.11TGa based OFDM modem with rounded IFFT/FFT module.