• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.1A
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• pp.73-81
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• 2012

In this paper, we propose a high-speed synchronization method for Digital Radio Mondiale (DRM) receivers. In order to satisfy the high-speed synchronization requirement of DRM receivers, the proposed method eliminate the initial sampling frequency synchronization process in conventional synchronization methods. In the proposed method, sampling frequency tracking is performed after integer frequency synchronization and frame synchronization. Different correlation algorithms are applied to detect the first frame of the Orthogonal Frequency Division Multiplexing (OFDM) demodulation symbol with sampling frequency offset (SFO). A frame detection algorithm that is robust to SFO is selected based on the performance analysis and simulation. Simulation results show that the proposed method reduces the time spent for initial sampling frequency synchronization even if SFO is present in the DRM signal. In addition, it is verify that inter-cell differential correlation used between reference cells is roubst to the effect of initial SFO.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.3C
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• pp.304-310
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• 2009

This paper proposes a successive MAP (maximum a posteriori probability) detection scheme with SoIC(soft interference cancellation) to reduce the receiver complexity of hierarchical M-ary QAM system. For the successive MAP detection, modulation symbols generated from the other data streams are treated as Gaussian noise or eliminated as the soft interference according to their priorities. The log-likelihood ratio of the a posteriori probability (LAPRP) of each bit is calculated by the MAP detector with an adjusted noise variance in order to take the elimination and Gaussian assumption effect into account. By separating the detection process into the successive steps, the detection complexity is reduced to increase linearly with the number of bits per hierarchical M-ary QAM symbol. Simulation results show that the proposed detection provides a small performance degradation as compared to the optimal MAP detection.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.7A
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• pp.1090-1098
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• 1999

In this paper ERP-4 viterbi decoder for magnetic disk read channel is designed. The viterbi decoder consists of ACS circuit, path memory circuit, minimum detection circuit, and output selection circuit. In the viterbi decoder the number of state is reduced from 8 to 6 using (1,7) RLL codes and modulo comparison based on 2's complement arithmetic is applied to handle overflow problem of ACS module. Also to determine the correct symbol values in nonconvergent condition of path memory, pipelined minimum detector which determines path with minimum state metric is used. The EPR-4 viterbi decoder is designed using 0.35${\mu}{\textrm}{m}$ CMOS technology and consists of about 15,300 transistors and has 250 Mbps data rates under 3.3 volts.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.11C
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• pp.940-948
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• 2008

This paper presents a low-power, low-complexity design and implementation results of a high speed multiple-input multiple-output orthogonal frequency division multiplexing (MIMO-OFDM) wireless LAN (WLAN) baseband processor. The proposed processor is composed of the physical layer convergence procedure (PLCP) processor and physical medium dependent (PMD) processor, which have been optimized to have low-power and reduced-complexity architecture. It was designed in a hardware description language (HDL) and synthesized to gate-level circuits using 0.18um CMOS standard cell library. As a result, the proposed TX-PLCP processor reduced the power consumption by as much as 81% over the bit-level operation architecture. Also, the proposed MIMO symbol detector reduced the hardware complexity by 18% over the conventional SQRD-based architecture with division circuits and square root operations.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.12
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• pp.13-19
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• 2008

In this paper, we propose a new CL-OSTBC (Closed Loop Orthogonal Space-Time Block Code) scheme for four transmit antennas and compare the scheme with existing closed loop schemes on the performance of BER (Bit Error Rate). In the proposed scheme, a transmitter receives channel feedback information and combines modulated symbols by the symbol combiner, and transmits the symbols encoded by the space-time block encoder. As a result, the proposed scheme achieves full-rate and maximal channel gains by more efficient utilization of the channel feedback information. Moreover, the scheme can reduce computation complexity by using a linear detector. Simulation results on the BER performance show that the proposed CL-OSTBC scheme outperforms existing CL-OSTBC schemes.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.12 no.4
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• pp.7-13
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• 2012

The performance of blind equalization algorithm ISCA was compared with MSCA that is used for the minimization of the inter symbol interference which occurs in the time dispersive communication channel for digital transmission. Because of the non-linearities of a magnitude and phase transfer characteristics of a communication channel, the transmitting signal will be received that band limited and time dispersived. Therefore the distortion was compensated by using the self adaptive equalizer at the receiving side, then passing through the detector for the decision of "1" or "0". At this time the Constellation Dependent Constant is played an important role in the adaptive equalizer used on the receiver. In order to calculation of this constant, the ISCA and MSCA was used the second order statistics. The ISCA and MSCA which are possible to compensation of mensioned transfer function simulataneously, are improved the performance of original SCA algorithm and then was compared the performance by computer simulation. For this, the recovered constellation, residual isi and MSE was used, and a result of performance comparison, the ISCA algorithm has better than the MSCA in every performance index. But on the steady state of equalizer, the variation of performance due to the CME terms in the MSCA equalization algorithm was less than the ISCA, so MSCA has better stability.