• Title/Summary/Keyword: subthreshold

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Investigation on the Doping Effects on L-shaped Tunneling Field Effect transistors(L-shaped TFETs) (도핑효과에 의한 L-shaped 터널링 전계효과 트랜지스터의 영향에 대한 연구)

  • Shim, Un-Seong;Ahn, Tae-Jun;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.05a
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    • pp.450-452
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    • 2016
  • The effect of channel doping on L-shaped Tunneling Field-Effect Transistors (TFETs) have been investigated by 2D TCAD simulation. When the source doping is over $10^{20}cm^{-3}$, the subthreshold swing (SS) is abruptly decreased, and when drain doping concentration is below $10^{18}cm^{-3}$, the leakage current in the negative voltage is reduced.

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Structure Guide Lines of Silicon-based Pocket Tunnel Field Effect Transistor (실리콘 기반 포켓 구조 터널링 전계효과 트랜지스터의 최적 구조 조건)

  • Ahn, Tae-Jun;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.05a
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    • pp.166-168
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    • 2016
  • This paper introduces about the structure guide lines of pocket tunneling Field effect transistor. As the pocket length or thickness increase, on-current $I_{on}$ increases. As the pocket thickness is less than 3nm, subthreshold swing (SS) increase. As the dielectric constants of the gate insulator increases, the performance of on-current and subthreshold swing enhances.

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A Subthreshold CMOS RF Front-End Design for Low-Power Band-III T-DMB/DAB Receivers

  • Kim, Seong-Do;Choi, Jang-Hong;Lee, Joo-Hyun;Koo, Bon-Tae;Kim, Cheon-Soo;Eum, Nak-Woong;Yu, Hyun-Kyu;Jung, Hee-Bum
    • ETRI Journal
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    • v.33 no.6
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    • pp.969-972
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    • 2011
  • This letter presents a CMOS RF front-end operating in a subthreshold region for low-power Band-III mobile TV applications. The performance and feasibility of the RF front-end are verified by integrating with a low-IF RF tuner fabricated in a 0.13-${\mu}m$ CMOS technology. The RF front-end achieves the measured noise figure of 4.4 dB and a wide gain control range of 68.7 dB with a maximum gain of 54.7 dB. The power consumption of the RF front-end is 13.8 mW from a 1.2 V supply.

Comparative Investigation on Tunnel Field Effect transistors(TFETs) Structure (터널링 전계효과 트랜지스터 구조 특성 비교)

  • Shim, Un-Seong;Ahn, Tae-Jun;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.10a
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    • pp.616-618
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    • 2016
  • Four types of structure of tunnel field-effect transistors (TFETs) have been investigated by TCAD simulation. Pocket and L-shaped TFETs are better performance than single-gate and double-gate TFETs in terms of on-current and subthreshold swing. New guideline of TFETs is presented for the structure design.

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Dual Gate L-Shaped Field-Effect-Transistor for Steep Subthreshold Slope

  • Najam, Faraz;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2018.05a
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    • pp.171-172
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    • 2018
  • Dual gate L-shaped tunnel field-effect-transistor (DG-LTFET) is presented in this study. DG-LTFET achieves near vertical subthreshold slope (SS) and its ON current is also found to be higher then both conventional TFET and LTFET. This device could serve as a potential replacement for conventional complimentary metal-oxide-semiconductor (CMOS) technology.

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Analysis of subthreshold region transport characteristics according to channel doping for DGMOSFET using MicroTec (MicroTec을 이용한 DGMOSFET의 채널도핑에 따른 문턱전압이하영역 특성분석)

  • Han, Ji-Hyung;Jung, Hak-Kee;Lee, Jong-In;Jeong, Dong-Soo;Kwon, Oh-Shin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.10a
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    • pp.715-717
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    • 2010
  • In this paper, the subthreshold characteristics have been alanyzed using MicroTec4.0 for double gate MOSFET(DGMOSFET). The DGMOSFET is extensively been studing since it can reduce the short channel effects due to structural characteristics. We have presented the short channel effects such as subthreshold swing and threshold voltage for DGMOSFET, using MicroTec, semiconductor simulator. We have analyzed for channel length, thickness and width to consider the structural characteristics for DGMOSFET. The subthreshold swing and threshold voltage have been analyzed for DGMOSFET using MicroTec since MicroTec is well verified as comparing with results of the numerical three dimensional models.

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Subthreshold Current Model for Threshold Voltage Shift Analysis in Junctionless Cylindrical Surrounding Gate(CSG) MOSFET (무접합 원통형 게이트 MOSFET에서 문턱전압이동 분석을 위한 문턱전압이하 전류 모델)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.4
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    • pp.789-794
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    • 2017
  • Subthreshold current model is presented using analytical potential distribution of junctionless cylindrical surrounding-gate (CSG) MOSFET and threshold voltage shift is analyzed by this model. Junctionless CSG MOSFET is significantly outstanding for controllability of gate to carrier flow due to channel surrounded by gate. Poisson's equation is solved using parabolic potential distribution, and subthreshold current model is suggested by center potential distribution derived. Threshold voltage is defined as gate voltage corresponding to subthreshold current of $0.1{\mu}A$, and compared with result of two dimensional simulation. Since results between this model and 2D simulation are good agreement, threshold voltage shift is investigated for channel dimension and doping concentration of junctionless CSG MOSFET. As a result, threshold voltage shift increases for large channel radius and oxide thickness. It is resultingly shown that threshold voltage increases for the large difference of doping concentrations between source/drain and channel.

A Study on the Subthreshold Swing for Double Gate MOSFET (더블게이트 MOSFET의 서브문턱스윙에 대한 연구)

  • Jung, Hak-Kee;Dimitrijev, Sima
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.4
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    • pp.804-810
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    • 2005
  • An analytical subthreshold swing (SS) model has been presented for double gate MOSFET(DGMOSFET) in this study. The results calculated by this model are more precise for about 10nm channel length and thickness than those derived from the previous models. The results of this model are compared with Medici simulation to varify the validity of this model, and good agreementes have been obtained. The changes of SS have been investigated for various channel lengths, channel thicknesses and gate oxide thicknesses using this model, given that these parameters are very important in design of DGMOSFET. This demonstrates that the proposed model provides useful data for design of nano-scale DGMOSFET. It is Known that the SS is improved to smaller ratios of channel thickness vs channel length and is smaller in very thin oxides. New gate dielectric materials with high permittivity have to be developed to enable design of nano-scale DGMOSFET.

Relation of Short Channel Effect and Scaling Theory for Double Gate MOSFET in Subthreshold Region (문턱전압이하 영역에서 이중게이트 MOSFET의 스켈링 이론과 단채널효과의 관계)

  • Jung, Hak-Kee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.7
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    • pp.1463-1469
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    • 2012
  • This paper has presented the influence of scaling theory on short channel effects of double gate(DG) MOSFET in subthreshold region. In the case of conventional MOSFET, to preserve constantly output characteristics,current and switching frequency have been analyzed based on scaling theory. To analyze the results of application of scaling theory for short channel effects of DGMOSFET, the changes of threshold voltage, drain induced barrier height and subthreshold swing have been observed according to scaling factor. The analytical potential distribution of Poisson equation already verified has been used. As a result, it has been observed that threshold voltage among short channel effects is grealty changed according to scaling factor. The best scaling theory for DGMOSFET has been explained as using modified scaling theory, applying weighting factor reflected the influence of two gates when scaling theory has been applied for channel length.

Analysis on Subthreshold Swing of Asymmetric Junctionless Double Gate MOSFET for Parameters for Gaussian Function (가우스 함수의 파라미터에 따른 비대칭형 무접합 이중 게이트 MOSFET의 문턱전압 이하 스윙 분석)

  • Jung, Hakkee
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.35 no.3
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    • pp.255-263
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    • 2022
  • The subthreshold swing (SS) of an asymmetric junctionless double gate (AJLDG) MOSFET is analyzed by the use of Gaussian function. In the asymmetric structure, the thickness of the top/bottom oxide film and the flat-band voltages of top gate (Vfbf) and bottom gate (Vfbb) could be made differently, so the change in the SS for these factors is analyzed with the projected range and standard projected deviation which are parameters for the Gaussian function. An analytical subthreshold swing model is presented from the Poisson's equation, and it is shown that this model is in a good agreement with the numerical model. As a result, the SS changes linearly according to the geometric mean of the top and bottom oxide film thicknesses, and if the projected range is less than half of the silicon thickness, the SS decreases as the top gate oxide film is smaller. Conversely, if the projected range is bigger than a half of the silicon thickness, the SS decreases as the bottom gate oxide film is smaller. In addition, the SS decreases as Vfbb-Vfbf increases when the projected range is near the top gate, and the SS decreases as Vfbb-Vfbf decreases when the projected range is near the bottom gate. It is necessary that one should pay attention to the selection of the top/bottom oxide thickness and the gate metal in order to reduce the SS when designing an AJLDG MOSFET.