• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2002년도 International Meeting on Information Display
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• pp.305-308
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• 2002

Field emission from single-walled carbon nanotubes (SWNTs) aligned on a patterned gold surface is reported. The SWNTs emitters were prepared at room temperature by a self-assembly monolayer technique. SWNTs were cut into sub-micron length by sonication in an acidic solution. Cut SWNTs were attached on the gold surface by the reaction between the thiol groups and the gold surface. The field emission measurement showed that the turn-on field was 4.8 $V/{\mu}m$ at the emission current density of 10 ${\mu}A/cm^2$. The current density was 0.5 $mA/cm^2$ at 6.6 $V/{\mu}m$. This approach provides a novel route for fabricating CNT-based field emission displays.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 추계학술대회 논문집 Vol.14 No.1
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• pp.121-125
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• 2001

We study the feasibility of synthesizing Si particles using PLA method. In the previous studies, it was possible to control the size of Si nanoparticles by the He gas pressure. In this study, we fabricated sub-micron size Si particles with various shapes such as conical, hexagonal, and ring by controlling not only the ambient gas pressure but also the laser energy density. Furthermore, we found that the conical Si particles were uniform-sized and had step shape when observed from FE-SEM and AFM. The conical Si particle has the same crystal structure as the bulk single crystalline Si by the analysis of the Raman scattering. It is shown that the relationship between the laser energy density and the He gas pressure inside the chamber affects the shape of the Si particle.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2005년도 추계학술대회 논문집 Vol.18
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• pp.130-131
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• 2005

In the era of submicron devices, super ultra thin gate oxide characteristics are required. Titanium silicide process has studied gate oxide reliability and dielectric strength characteristics as the composition of gate electrode. In this study the author observed process characteristics on MOS structure. In view point of the process characteristics of MOS capacitor, the oxygen & Ti, Si2 was analyzed by SIMS analysis on before and after annealing with 1,2 step silicidation, the Ti contents[Count/sec]of $9.5{\times}1018$ & $6.5{\times}1018$ on before and after 2'nd anneal. The oxygen contents[Count/sec] of $4.3{\times}104$ & $3.65{\times}104$, the Si contents[Count/sec] of $4.2{\times}104$ & $3.7{\times}104$ on before and after 2'nd anneal. The rms value[A] was 4.98, & 4.03 on before and after 2'nd anneal.

• 한국표면공학회지
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• 제24권1호
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• pp.1.2-1.2
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• 1991

The formation of managanese ferrite has been performed to investigate some properties according to the variation of compositions, pH, current density by electrolysis. It has been found that the amount of oxidized weight of anode were increased with increasing current density. The amount of oxidized weight of anode were most in pH10. As the result of X-ray diffraction Mn Fe2O4 crystal composition in pH13. When the particles of Mnx Fe3-x O4 were heated at 30$0^{\circ}C$, it has been shown typical MnFe2O4(JCPDS Card No. 10-319) in X-1 composition. As the result of SEM observation, the size of MnFe2O4 particles were about 0.1$\mu\textrm{m}$, the shape of particles were spherical type. According to the above mentioned experimental condition, 0.1-0.5$\mu\textrm{m}$ sub-micron particles of manganese ferrite were formed from the wasted manganese dry cell, through washing longrightarrow reduction longrightarrow electrloysis.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
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• pp.808-810
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• 2005

Inexpensive large area arrays of thin film transistors (TFTs) on flexible substrates will enable many new display products that cannot be cost effectively manufactured by conventional means. This paper presents a new approach for low cost manufacturing of electronic devices using roll-to-roll (R2R) processes exclusively. It was developed in partnership by Hewlett Packard Laboratories and Iowa Thin Film Technologies (ITFT), a solar cell manufacturer. The approach combines ITFT's unique processes for vacuum deposition and etching of semiconductors, dielectrics and metals on continuous plastic webs with a method HP has invented for the patterning and aligning the multiple layers of a TFT with sub-micron accuracy and feature size.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
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• pp.476-479
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• 2005

We developed a plastic bistable LCD based on the suspension of sub-micron ferroelectric particles in a cholesteric liquid crystal. 2.5 inch $160{\times}160$ pixel display with enhanced contrast and improved electro-optical characteristics was achieved. The display is extremely light and possesses good flexibility, demonstrating multifold bending in a radius about 1.5 cm.

• Journal of Information Display
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• 제5권1호
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• pp.7-15
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• 2004

A highly simplified backlight unit mainly composed of diffractive grating in sub-micron order imprinted light-guide plate (LGP) is proposed for edge-lit backlight unit. Optical characteristics of the imprinted LGP are examined by RCWA and the performance is verified through Monte Carlo simulation. Results show that the diffraction efficiency, luminous flux and its uniformity over the area are significantly affected by the angle of incident ray. Consequently couples of design considerations are additionally proposed to enhance luminous flux. In terms of peak luminance and out-coupling luminous flux, the experimental results are agreed well with the performance simulation. Finally, compared with optical characteristics of conventional backlight unit, we could conclude that the proposed simplified backlight unit made of diffractive grating imprinted light-guide plate is a good substitute for the conventional backlight unit.

• 전기의세계
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• 제46권4호
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• pp.22-27
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• 1997

DRAM(Dynamic Randum Access Memory)은 반도체 소자 중 가장 대표적인 기억소자로, switch 역할을 하는 1개의 transistor와 data의 전하를 축적하는 1개의 capacitor로 구성된 단순한 구조와 고 집적화에 용이하다는 이점을 바탕으로, super-computer에서 가전제품, 통신기기 및 산업기기에 이르기까지 널리 이용되어 왔다. 한편으로 DRAM사업은 고가의 장치사업으로 조기 시장 진입을 위하여 초기에의 막대한 자본투자, 급속한 기술발전, 짧은 life cycle, 가격급락 등이 심하여, 시한내에 투자회수가 이루어져야 하는 위험도가 큰 기회사업이라는 양면성을 가지고 있다. 이러한 관점 때문에 새로운 DRAM 기술은 매 세대마다 끊임없이 빠른 속도로 개발되어왔다. 그러나 sub-half-micron 이하의 DRAM세대로 갈수록 그에 대한 새로운 기술은 점차 어렵게 되어가고, 한편으로는 system의 다양화에 따른 요구도 강하여, 이제는 통상적인 DRAM의 고집적화 및 저가의 전략만으로는 생존하기 어려운 실정이므로 개발전략도 수정하여야만 할 것이다. 이러한 어려운 기술한계를 극복하기 위하여 새로운 소자기술 및 공정개발에 애닿 breadthrough가 이루어져야 할 것이다. 이러한 관점에서 현재까지의 DRAM개발 추이와 향후의 기술방향에 관하여 몇 가지 중요한 item을 설정하여 논의하여 보기로 한다.

• Transactions on Electrical and Electronic Materials
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• 제3권4호
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• pp.1-4
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• 2002

As the application of semiconductor chips into electronics increases, it requires more complete integration, which results in higher performance. And it needs minimization in device design for cost saving of manufacture. Therefore oxide gap fill has become one of the major issues in sub-micron devices. Currently HDP (High-Density Plasma) CVD system is widely used in IMD (Inter Metal Dielectric) to fill narrower space between metal lines. However, HDP-CVD system has some potential problems such as plasma charging damage, metal damage and etc. Therefore, we will introduce about one of via resistance failure by metal damage and a preventive method in this paper.

• 대한전자공학회논문지
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• 제25권2호
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• pp.182-187
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• 1988

Hot carrier induced device degradation characteristics under DC bias stress have been investigated in n-MOSFETs with channel length of 1.2,1.8 um, and compared with those of LDD structure device with same channel length. Based on these results, the device lifetime in normal operating bias(Vgs=Vds=5V) is evaluated. The lifetimes of conventional and LDD n-MOSFET with channel length of 1.2 um are estimated about for 17 days and for 12 years, respectively. The degradation rate of LDD n-MOSFET under the same stress is the lowest at n-region implnatation dose of 2.5E15 cm-\ulcorner while the substrate current is the lowest at the dose of 1E13cm-\ulcorner Thses results show that the device degradation characteristics are basic measurement parameter to find optimum process conditions in LDD devices and evaluate a reliability of sub-micron device.