• ETRI Journal
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• v.38 no.4
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• pp.714-723
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• 2016

Considerable attention has been given to processing graph data in recent years. An efficient method for computing the node proximity is one of the most challenging problems for many applications such as recommendation systems and social networks. Regarding large-scale, mutable datasets and user queries, top-k query processing has gained significant interest. This paper presents a novel method to find top-k answers in a node proximity search based on the well-known measure, Personalized PageRank (PPR). First, we introduce a distribution state transition graph (DSTG) to depict iterative steps for solving the PPR equation. Second, we propose a weight distribution model of a DSTG to capture the states of intermediate PPR scores and their distribution. Using a DSTG, we can selectively follow and compare multiple random paths with different lengths to find the most promising nodes. Moreover, we prove that the results of our method are equivalent to the PPR results. Comparative performance studies using two real datasets clearly show that our method is practical and accurate.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.10 s.340
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• pp.47-54
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• 2005

In this paper, a new synthesis method for testability of synchronous sequential circuits is suggested on an incompletely-specified state transition graph (STG) by reducing the number of redundant faults. In the suggested synthesis method, 1) a given STG is modified by adding undefined states and unspecified input transitions using distinguishable transition, 2) the STG is modified to be strongly-connected as much as possible. Experimental results with MCNC benchmark show that the number of redundant faults of gate-level circuits synthesized by our modified STGs are reduced, and much higher fault coverage is obtained.

• The Journal of Korea Robotics Society
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• v.19 no.2
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• pp.196-202
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• 2024

The ability to understand given environments and plan a sequence of actions leading to goal state is crucial for personal service robots. With recent advancements in deep learning, numerous studies have proposed methods for state representation in planning. However, previous works lack explicit information about relationships between objects when the state observation is converted to a single visual embedding containing all state information. In this paper, we introduce graph-based state representation that incorporates both object and relationship features. To leverage these advantages in addressing the task planning problem, we propose a Graph Neural Network (GNN)-based subgoal prediction model. This model can extract rich information about object and their interconnected relationships from given state graph. Moreover, a search-based algorithm is integrated with pre-trained subgoal prediction model and state transition module to explore diverse states and find proper sequence of subgoals. The proposed method is trained with synthetic task dataset collected in simulation environment, demonstrating a higher success rate with fewer additional searches compared to baseline methods.

• Journal of Electrical Engineering and information Science
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• v.2 no.6
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• pp.43-47
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• 1997

A procedure presented in this paper generates test sequences to check the conformity of an implementation with a protocol specification, which is modeled as a deterministic finite state machine (FSM). Given a FSM, a common procedure of test sequence generation, first, constructs a directed graph which edges include the state check after each transition, and produces a symmetric graph G* from and, finally, finds a Euler tour of G*. We propose a technique to determine a minimum-cost tour of the transition graph of the FSM. The proposed technique using Multiple Unique State Signature (MUSS) solves an open issue that one MUIO sequence assignment may lead to two more edges of unit cost being replicated to from G* while an optimal assignment may lead to the replication of a single edge of high cost. In this paper, randomly generated FSMs have been studied as test cases. The result shows that the proposed technique saves the cost 4∼28% and 2∼21% over the previous approach using MUIO and MUSP, respectively.

• The Transactions of the Korea Information Processing Society
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• v.7 no.8
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• pp.2430-2441
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• 2000

A visual concurrent programming environment, called ESTGVP is designed and implemented, which is easy to understand, highly portable, and can represent parallel behaviors. For our purpose, a conventional state transition graph is extended so as to enable both of synchronous and asynchronous parallel operations. We call it extended state transition graph (ESTG). ESTGVP uses the ESTG and texts for programming, and makes it easy programming sequential and parallel behaviors. Also, it is easy to understand the control structure of a program because ESTGVP is a visual programming environment based on the graph. ESTGVP is written in Tel language and thus it is highly portable on various operating systems. It consists of three major components; edition, transformation and execution. If necessary, ESTG can be transformed into C or Tel language, and its execution is based on Tel.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.11B
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• pp.1020-1029
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• 2008

This paper proposes an high speed pattern matching algorithm and its implementation. The pattern matcher is used to check patterns from realtime input packet. The proposed algorithm can find exact string, range of string values, and combination of string values from input packet at high speed. Given string and rule set are modelled as a state transition graph which can find overlapped strings simultaneously, and the state transition graph is partitioned according to input implicants to reduce implementation complexity. The pattern matcher scheme uses the transformed state transition graph and input packet as an input. The pattern matcher was modelled and implemented in VHDL language. Experimental results show the proprieties of the proposed approach.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.17 no.4
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• pp.415-423
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• 1992

In this paper, we developed a Graphic Editor which automatically translated the state transition graph into state CHDL. Also, an algorithm for efficient state minimization is presented to reduce the redundancy state transition table.

• Journal of KIISE:Computer Systems and Theory
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• v.27 no.2
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• pp.216-226
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• 2000

This paper presents a new method to synthesize timed asynchronous circuits directly from the specification without generating a state graph. The synthesis procedure begins with a deterministic signal transition graph specification with timing constraints. First, a timing analysis extracts the timed concurrency and timed causality relations between any two signal transitions. Then, a hazard-free implementation under the timing constraints is synthesized by constructing a precedence graph and finding paths in the graph. The major result of this work is that the method does not suffer from the state explosion problem, achieves significant reductions in synthesis time, and generates circuits that have nearly the same area as compared to previous methods.

• Journal of the Korea Society of Computer and Information
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• v.15 no.1
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• pp.71-81
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• 2010

In a typical web environment, it is difficult to determine the update and re-computation status of WebView content or the transition of WebView processing included in web page. If an update to one of data is performed before a read operation to that, we could get a wrong result due to the incorrect operation and increase a complexity of the problem to process. To solve this problem, lots of researchers have studied and most of these problems at the single user environment is not problems. However, the problems at a distributed environment might be occurred. For this reason, in this paper, we proposed the extended state transition graph and algorithms for each status of WebView for explaining WebView state in the distributed environment and analyze the performance of using the materialized WebView and not. Additionally, also analyze the timing issues in network and effectiveness which follows in size of WebView contents.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.10
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• pp.195-204
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• 1996

We suggest a transform method form asynchronous finite state machines (AFSMs) into signal transition graphs (STGs) for speed-independent circuit synthesis. Existing works synthesize nodes in the state graph increases exponentially as the number of input and output signals increases. To overcome the problem of the exponential data complexity, we transform AFSMs into STGs so that the previous synthesis algorihtm form STGs can be applied.Accoridng to the experimental results, it turns out that our synthesis method produces more efficient circuit than the previous synthesis methods.