• IEMEK Journal of Embedded Systems and Applications
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• v.12 no.3
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• pp.169-176
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• 2017

To replace conventional DRAM, many researches have been done on nonvolatile memories. The DRAM&PCM hybrid memory is one of the effective structure because it can utilize an advantage of DRAM and PCM. However, in order to use this characteristics, pages can be replaced frequently between DRAM and PCM. Therefore, PCM still has major problem that has write-limits. Therefore, it needs an effective page management method for exploiting each memory characteristics dynamically and adaptively. So we aim reducing an average access time and write count of PCM by utilizing two locality for an effective page replacement. We proposed a page selection algorithm which is recently requested to write in DRAM and an algorithm witch uses two locality in PCM. According to our simulation, the proposed algorithm for the DRAM&PCM hybrid can reduce the PCM write count by around 22% and the average access time by 31% given the same PCM size, compared with CLOCK-DWF algorithm.

• Journal of KIISE:Software and Applications
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• v.26 no.12
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• pp.1404-1417
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• 1999

웹과 같은 분산 환경에서는, 웹 브라우저 상에서 SQL 형식의 공간 질의를 수행시키는 것과 또한 서버로부터 그 질의 결과를 보는 것이 가능하다. 그러나, 격자 이미지(raster image)와 같은 대용량 공간 데이타를 포함하는 질의 결과를 웹 브라우징할 때 발생하는 많은 문제점들 중에서, 사용자 응답 시간의 지연은 매우 중요한 문제이다. 본 논문에서는 사용자의 재요청(callback) 접근 패턴이 공간적 근접성(spatial locality)을 따른다는 가정하에서의, 사용자 응답 시간을 최소화하기 위한 새로운 프리페치(prefetch) 전략에 대해서 서술한다. 본 논문의 프리페치 전략은 다음과 같이 요약될 수 있다. 첫째, 프리페치 알고리즘은 사용자의 접근 패턴을 잘 반영하는 힐버트 곡선(Hilbert-curve) 모델을 바탕으로 한다. 둘째, 프리페치 전송 비용을 줄이기 위해서 사용자의 재요청 시간 간격(think time)을 이용한다. 본 논문에서는, 힐버트 곡선을 이용한 프리페치 전략의 성능 평가를 위해서 다양한 실험을 하였으며, 그 결과로 프리페치를 하지 않는 방식보다 높은 성능 향상이 있음을 보인다.Abstract In distributed environment(e.g., WWW), it would be possible for the users to submit SQL-like spatial queries and to see their query results from the server on the Web browser. However, of many obstacles which result from browsing query results including large spatial data such as raster image, the delay of user response time is very critical. In this paper we present a new prefetch policy which can alleviate user response time on the assumption that user's callback access pattern has spatial locality. Our prefetch policy can be summerized as follows: 1) our prefetch algorithm is based on the Hibert-curve model which well replects user's access pattern, and 2) it utilizes user's callback interval to reduce prefetch network transmission cost. In this paper we conducted diverse experiments to show that our prefetch policy achieves higher performance improvement compared to other non-prefetch methods.

• Journal of the Korea Society of Computer and Information
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• v.16 no.2
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• pp.1-8
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• 2011

NAND type Flash memory has performing much researches for a hard disk substitution due to its low power consumption, cheap prices and a large storage. Especially, the NAND type flash memory is using general buffer systems of a cache memory for improving overall system performance, but this has shown a tendency to emphasize in terms of data. So, our research is to design a high performance instruction NAND type flash memory structure by using a buffer system. The proposed buffer system in a NAND flash memory consists of two parts, i.e., a fully associative temporal buffer for branch instruction and a fully associative spatial buffer for spatial locality. The spatial buffer with a large fetching size turns out to be effective serial instructions, and the temporal buffer with a small fetching size can achieve effective branch instructions. According to the simulation results, we can reduce average miss ratios by around 77% and the average memory access time can achieve a similar performance compared with the 2-way, victim and fully associative buffer with two or four sizes.

• Journal of KIISE:Software and Applications
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• v.32 no.10
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• pp.1003-1012
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• 2005

The most significant difference of embedded systems from general purpose systems is that embedded systems are allowed to use only limited resources including battery and memory. Especially, the number of applications increases which deal with multimedia data. In those systems with high data computations, the delay of memory access is one of the major bottlenecks hurting the system performance. As a result, many researchers have investigated various techniques to reduce the memory access cost. Most programs generally have locality in memory references. Temporal locality of references means that a resource accessed at one point will be used again in the near future. Spatial locality of references is that likelihood of using a resource gets higher if resources near it were just accessed. The latest embedded processors usually adapt cache memory to exploit these two types of localities. Processors access faster cache memory than off-chip memory, reducing the latency. In this paper we will propose the enhanced dynamic allocation technique for structure-type data in order to eliminate unused memory space and to reduce both the cache miss rate and the application execution time. The proposed approach aggregates fields from multiple records dynamically allocated and consecutively remaps them on the memory space. Experiments on Olden benchmarks show $13.9\%$ L1 cache miss rate drop and $15.9\%$ L2 cache miss drop on average, compared to the previously proposed techniques. We also find execution time reduced by $10.9\%$ on average, compared to the previous work.

• ETRI Journal
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• v.37 no.1
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• pp.147-156
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• 2015

A typical solid-state drive contains several independent channels that can be operated in parallel. To exploit this channel-level parallelism, a variety of works proposed to split consecutive write sequences into small segments and schedule them to different channels. This scheme exploits the parallelism but breaks the spatial locality of write traffic; thus, it is able to significantly degrade the efficiency of garbage collection. This paper proposes a channel-aware write reordering (CAWR) mechanism to schedule write requests to different channels more intelligently. The novel mechanism encapsulates correlated pages into a cluster beforehand. All pages belonging to a cluster are scheduled to the same channels to exploit spatial locality, while different clusters are scheduled to different channels to exploit the parallelism. As CAWR covers both garbage collection and I/O performance, it outperforms existing schemes significantly. Trace-driven simulation results demonstrate that the CAWR mechanism reduces the average response time by 26% on average and decreases the valid page copies by 10% on average, while achieving a similar hit ratio to that of existing mechanisms.

• Journal of the Korea Convergence Society
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• v.9 no.2
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• pp.151-156
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• 2018

In this paper, an efficient reversible watermarking algorithm is proposed. By using the proposed algorithm, it is possible to increase the amount of copyright-related information to be embedded in cover image. Depending on the spatial locality and surface characteristics, it is possible to precisely predict the pixel value using neighboring pixels. If the predicted pixel value almost the same as the pixel value of the cover image, the differential value between the predicted pixel value and the pixel value of cover image is very small. So, the frequency is increased greatly at the peak point of histogram of difference sequence. Thus, it is possible to increase greatly the amount of secret data to be embedded in cover image. The experimental results show that the proposed watermarking algorithm is superior to the previous algorithms.

• Journal of KIISE:Computer Systems and Theory
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• v.27 no.11
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• pp.908-918
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• 2000

캐쉬의 성능을 향상시키는 가장 효과적인 방법은 프로그램 수행 특성에 내재되어 있는 시간적 (temporal locality) -공간적 지역성 (spatial locality)을 활용하는 것이다. 본 논문에서는 추가적인 장치나 컴파일러의 도움 없이 단지 캐쉬의 구조적인 특징과 간단한 메커니즘만을 이용하여 두 가지 타입의 지역성을 효과적으로 반영할 수 있는 새로운 캐쉬 시스템이 제안된다. 제안하는 새로운 캐쉬 시스템은 다른 블록 크기와 다른 연관도를 가지는 두 개의 캐쉬로써 구성되어 진다. 즉 작은 블록 크기를 지원하는 직접사상 캐쉬 (direct-mapped cache)와 큰 블록을 지원하는 완전 연관 버퍼 (fully-associative buffer)로 구성되어 진다. 큰 블록은 여러 개의 작은 블록으로 구성되어지며 두 캐쉬에서 접근 실패가 발생할 경우 직접사상 캐쉬의 접근 실패가 발생한 작은 블록과 그 이웃 작은 블록을 완전 연관 버퍼에 저장시킴으로써 한번 참조가 일어난 블록의 이웃 블록이 참조될 확률이 높다는 공간적 지역성의 특성을 효과적으로 반영할 수 있다. 또한 참조가 일어난 블록은 제어 비트를 사용하여 선택적으로 작은 블록을 직접사상 캐쉬에 저장함으로써 시간적 지역성을 보다 효과적으로 사용할 수 있다 시뮬레이션 결과에 따르면 기존의 직접사상 캐쉬의 4배 크기보다도 좋은 성능 향상을 보이고 있으며, 동일한 크기의 victim 캐쉬보다 우수한 성능을 보이고 소비 전력 면에서는 5% 정도의 전력 감소를 보이고 있다.

• Korean Institute of Interior Design Journal
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• v.21 no.6
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• pp.100-108
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• 2012

Modern architecture tends to split the everyday life and the space of human. Position of architecture should be on the relationship between nature and human need. It will be study on the everyday life of architecture from architecture and everyday life of human relationships. Based on this study, it makes clear the visual aspects of architectural experience to acquire spatial tones for analyzing architectural Everyday-ness. In this case, Portugal's modern architectural space was impressing, because of the construction of local color and architectural vocabulary of the Everyday-ness. Therefore, the Everyday-ness of Architecture by relationship analysis reveals the space of these spatial tones. Spatial characteristics of the Everyday-ness of architecture be analyzed of simplicity, purity, locality, reminiscent, continuity, and transition, etc. Expression elements of spatial tones can be derived into five classes such as light, color, material, pattern (texture), and depth. In conclusion, spatial characteristics of the Everyday-ness and expression elements of spatial tones consist of configuration matrixes to analyze the spatial tones of the contemporary architecture in Portugal. As a result of this study, the expression characteristics of spatial tones of contemporary architecture in Portugal are background-ness, one-ness, and inherence. I hope this study will be applied to the basic data of the architectural Everyday-ness.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.2
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• pp.75-84
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• 2005

This research is to design a high performance NAND-type flash memory package with a smart buffer cache that enhances the exploitation of spatial and temporal locality. The proposed buffer structure in a NAND flash memory package, called as a smart buffer cache, consists of three parts, i.e., a fully-associative victim buffer with a small block size, a fully-associative spatial buffer with a large block size, and a dynamic fetching unit. This new NAND-type flash memory package can achieve dramatically high performance and low power consumption comparing with any conventional NAND-type flash memory. Our results show that the NAND flash memory package with a smart buffer cache can reduce the miss ratio by around 70% and the average memory access time by around 67%, over the conventional NAND flash memory configuration. Also, the average miss ratio and average memory access time of the package module with smart buffer for a given buffer space (e.g., 3KB) can achieve better performance than package modules with a conventional direct-mapped buffer with eight times(e.g., 32KB) as much space and a fully-associative configuration with twice as much space(e.g., 8KB)

• Journal of the Korean association of regional geographers
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• v.5 no.1
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• pp.77-90
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• 1999

This paper aims to understand the changing characteristics of the Kumi region as a locality in Korea through the regional geography of the world-system approach. To illustrate the changing regional characteristics, we analyzed the economic characteristics or position of the Kumi region within the world-economy and its spatial structure with three divisions of Korean capitalist periods: the Japanese colonial period ($1910{\sim}1945$), the social chaos period ($1945{\sim}1960$), and the economic development period ($1960{\sim}$present). In the Japanese colonial and social chaos periods, as Korean society was incorporated into the peripheral zone within the world-System (world-economy), Kumi also was made into a peripheral agricultural area. As a result, the Kumi region shaped the rural spatial structure without an urban center or regional dominant center. In the development period, influenced by the manufacturing-centered economic policy which boosted Korea as a semi-periphery within world-economy, Kumi also was developed into an industrial region(or semi-periphery) with the establishment of the Kumi electronic and textile industrial complex. This industrialization transformed the rural spatial structure of Kumi into a core (urban center)-periphery (rural area) structure. As we identified above, the regional geography of the world-system approach turned out to be a useful methodology to study a locality or internal region. Therefore we should make efforts to study such regions through the regional geography of the world-system approach.