• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.12
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• pp.1001-1007
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• 2002

In this paper we analyzed the effects of pentacene thickness and the location of source/drain contacts on the performance of pentacene TFT Above a certain thickness of pentacene thin film the pentacene grain was turned from the thin film phase into the bulk phase, resulting in degrading the crystallinity and then performance as well. For the top contact structure in which source/drain contacts are located above pentacene film, the contact resistance decreased comparing with the bottom contact structure. However, the leakage current in the off-state became large and then the related parameters such as on/off current ratio were deteriorated. We found that the thickness of around 300$\AA$-700$\AA$ was suitable, and that the bottom contact was more feasible for hig Performance pentacene OTFT.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.19 no.3
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• pp.93-98
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• 2005

Silicon bipolar transistors (Si-BJT) are widely used in the telecommunication system such as short range wireless control and wireless indoor voice communication system. New modeling method for the internal current source model of Si-BJT is proposed. The proposed method based on new thermal resistance extraction method and new analytical expressions for the current source parameters of Si-BJT. The proposed method can directly extract the model parameters without any optimization procedure which is adopted in the conventional modeling method. The proposed method is applied to 5 finger $0.4\times20[{\mu}m^2]$ and the model shows good prediction of the measured data in $3[\%]$ of errors proving the validity of this method.

• Journal of Satellite, Information and Communications
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• v.8 no.1
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• pp.45-53
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• 2013

An electrostatic discharge (ESD) protection device, so called, N-type extended drain silicon controlled rectifier (NEDSCR) device, was analyzed for high voltage I/O applications. A conventional NEDSCR device shows typical SCR-like characteristics with extremely low snapback holding voltage. This may cause latch-up problem during normal operation. However, a modified NEDSCR device with proper junction/channel engineering using counter pocket source (CPS) ion implantation demonstrates itself with both the excellent ESD protection performance and the high latch-up immunity. Since the CPS implant technique does not change avalanche breakdown voltage, this methodology does not reduce available operation voltage and is applicable regardless of the operation voltage.

• International Journal of Precision Engineering and Manufacturing
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• v.7 no.4
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• pp.47-50
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• 2006

SCM415 alloy was implanted with nitrogen ions using plasma source ion implantation (PSII), at a dose range of $1{\times}10^{17}\;to\;6{\times}10^{17}\;N^+cm^{-2}$ Auger electron spectrometry (AES) was used to investigate the depth profile of the implanted layer. Friction and wear tests were carried out on a block-on-ring wear tester. Scanning electron microscopy (SEM) was used to observe the micro-morphology of the worn surface. The results revealed that after being implanted with nitrogen ions, the frictional coefficient of the surface layer decreased, and the wear resistance increased with the nitrogen dose. The tribological mechanism was mainly adhesive, and the adhesive wear tended to become weaker oxidative wear with the increase in the nitrogen dose. The effects were mainly attributed to the formation of a hard nitride precipitate and a supersaturated solid solution of nitrogen in the surface layer.

• Journal of the Korean Chemical Society
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• v.14 no.4
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• pp.327-332
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• 1970

A simple and convenient device for deflection-type direct reading the variations in electrolytic conductance is described and applied to the analysis of sulfur by combustion-$H_2O_2$ oxidation method. The apparatus consisted of a high resistance-ratio bridge in which the other adjacent arms are the differential cells. By adopting unusually high a-c voltage source for the bridge excitation, the a-c method for unbalanced bridge is established, decreased sensitivity owing to reduced bridge factor, 0.01, is overcome and also the absolute sensitivity and linearity are greatly improved. Over 50% variations in impedance of the balanced cell, within 1% deviation from the linearity can be attained with a volt (rms)order of output which was detected directly with VTVM without further amplification. Analysis of the bridge shows that these useful features are natural result of the constant current character of the high source impedance generator and the performance of the device agreed with the theoretical predictions. A standard procedure for the rapid analysis of sulfur using the bridge is also given, the analytical accuracy was approximately 1%. A determination takes not more than 5 minutes.

• Journal of Power Electronics
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• v.15 no.4
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• pp.994-1005
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• 2015

This paper presents a novel power control strategy for PWM current-source rectifiers (CSRs) in the stationary frame based on the instantaneous power theory. In the proposed control strategy, a virtual resistance based on the capacitor voltage feedback is used to realize the active damping. In addition, the proportional resonant (PR) controller under the two-phase stationary coordinate is designed to track the ac reference current and to avoid the strong coupling brought about by the coordinate transformation. The limitations on improving steady-state performance of the PR controller is investigated and mitigated using a cascaded lead-lag compensator. In the z-domain, a straightforward procedure is developed to analyze and design the control-loop with the help of MATLAB/SISO software tools. In addition, robustness against parameter variations is analyzed. Finally, simulation and experimental results verify the proposed control scheme and design method.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.34 no.1
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• pp.16-20
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• 2021

In this study, we tried finding new materials to improve the stain resistance properties of polymer insulating materials. Using the filtered vacuum arc source (FVAS) with a graphite target source, DLC thin films were deposited on silicon and polymer insulator substrates depending on their thickness to confirm the surface properties, physical properties, and structural properties of the thin films. Subsequently, the possibility of using a DLC thin film as a protective coating material for polymer insulators was confirmed. DLC thin films manufactured in accordance with the thickness of various thin films exhibited a very smooth and uniform surface. As the thin film thickness increased, the surface roughness value decreased and the contact angle value increased. In addition, the elastic modulus and hardness of the DLC thin film slightly increased, and the maximum values of elastic modulus and hardness were 214.5 GPa and 19.8 GPa, respectively. In addition, the DLC thin film showed a very low leakage current value, thereby exhibiting electrical insulation properties.

• Journal of Ceramic Processing Research
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• v.13 no.spc1
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• pp.128-131
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• 2012

The selective area growth light emitting diode on GaN substrate was grown using mixed-source HVPE method with multi-sliding boat system. The GaN substrate was grown using mixed-source HVPE system. Te-doped AlGaN/AlGaN/Mg-doped AlGaN/Mg-doped GaN multi-layers were grown on the GaN substrate. The appearance of epi-layers and the thickness of the DH was evaluated by SEM measurement. The DH metallization was performed by e-beam evaporator. n-type metal and p-type metal were evaporated Ti/Al and Ni/Au, respectively. At the I-V measurement, the turn-on voltage is 3 V and the differential resistance is 13 Ω. It was found that the SAG-LED grown on GaN substrate using mixed-source HVPE method with multi-sliding boat system could be applied for developing high quality LEDs.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.157-157
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• 2008

As the minimum feature size of semiconductor devices scales down to nano-scale regime, ultra shallow junction is highly necessary to suppress short channel effect. At the same time, Ni-silicide has attracted a lot of attention because silicide can improve device performance by reducing the parasitic resistance of source/drain region. Recently, further improvement of device performance by reducing silicide to source/drain region or tuning the work function of silicide closer to the band edge has been studied extensively. Rare earth elements, such as Er and Yb, and Pd or Pt elements are interesting for n-type and p-type devices, respectively, because work function of those materials is closer to the conduction and valance band, respectively. In this paper, we increased the work function between Ni-silicide and source/drain by using Pd stacked structure (Pd/Ni/TiN) for high performance PMOSFET. We demonstrated that it is possible to control the barrier height of Ni-silicide by adjusting the thickness of Pd layer. Therefore, the Ni-silicide using the Pd stacked structure could be applied for high performance PMOSFET.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.35 no.7
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• pp.278-284
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• 1986

Double-diffused metal oxide power semiconductor field effect transistors are used extensively in recent years in various circuit applications. The temperature variation of the drain current at a fixed bias shows both positive and negative resistance characteristics depending on the gate threshold voltage and gate-to source bias votage. In this paper, the decision method of the gate crossover voltage by the temperature variation and a new method to determine the gate threshold voltage graphecally are presented.