• 한국신재생에너지학회:학술대회논문집
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• 2009.11a
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• pp.355-358
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• 2009

This paper presents the technology of selective emitter for high efficiency crystalline silicon solar cell. The effect of selective emitter is analyzed by using the simulation program for solar cell, PC1D. The selective emitter shows better spectral response in short wavelength regions compared to homogeneous emitter. Therefore, the efficiency of solar cell with selective emitter can be improved by changing the sheet resistance from 60 $\Omega/\square$ to 120 $\Omega/\square$. In addition, the power loss of solar cell can be minimized by optimizing width and gap of the finger electrodes on the selective emitter.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.600-600
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• 2012

실리콘 이종접합 태양전지는 diffused dopant를 이용하여 high conductivity의 emitter를 가지는 기존의 crystalline silicon 태양전지와는 다르게 a-Si:H를 이용한 low conductivity emitter 때문에 TCO를 front electrode 및 anti-reflection layer로 사용한다. 하지만 TCO와 emitter사이의 work function mismatch에 의한 band-offset이 발생하고 photo-generation된 carrier의 injection을 막아 효율 상승을 제한하게 된다. 본 연구는 산소 반응성 스퍼터링을 통한 front TCO의 일함수 변경과 이에 따른 TCO와 emitter 계면에 존재하는 band-offset 변화에 대하여 분석하였다. 특히 산소 분압에 따른 front TCO의 일함수 변화에 따라 개방전압 및 단락전류 변화가 두드러지게 나타났으며, 직렬저항 성분 변화에 따른 충진률 변화에 따른 효율상승을 얻을 수 있었다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.12
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• pp.1039-1044
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• 2002

Film Bulk Acoustic Resonator (FBAR) using thin piezoelectric films can be made as monolithic integrated devices with compatibility to semiconductor process, leading to small size, low cost and high Q RF circuit elements with wide applications in communications area. This paper presents an MMIC compatible suspended FBAR using SOI micromachining. It is possible to make a single crystal silicon membrane using a SOI wafer In fabricating active devices, SOI wafer offers advantage which removes the substrate loss. FBAR was made on the 12㎛ silicon membrane. Electrode and Piezoelectric materials were deposited by RF magnetron sputter. The maximum resonance frequency of FBAR was shown at 2.5GHz range. The reflection loss, K$^2$$\_$eff/, Q$\_$serise/ and Q$\_$parallel/ in that frequency were 1.5dB, 2.29%, 220 and 160, respectively.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.10
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• pp.790-795
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• 1998

Fabrication of inverted staggered power TFT devices and electrical characteristic were investigated. 16 fingers with drain and source electrode of TFT and 100V output voltage were designed successfully. It is observed that as $V_g$ increased, $I_d$ increase exponentially. Because of localized deep states of a-Si, $I_d$ shows irregular variation at low voltage. Output and transfer characteristic showed the same as typical variation. But electrical characteristic strongly depend on the channel length and thickness of silicon nitride and amorphous silicon.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.53 no.4
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• pp.208-212
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• 2004

In this paper, the characteristics of co-sputtered Ru-Zr metal alloy as gate electrode of MOS capacitors have been investigated. The atomic compositions of alloy were varied by using the combinations of relative sputtering power of Ru and .Zr. C-V and I-Vcharacteristics of MOS capacitors were measured to find the effective oxide thickness and work function. The alloy made of about 50% of Ru and 50% of Zr exhibited an adequate work function for nMOS. C-V and I-V measurements after 600 and $700^{\circ}C$ rapid thermal annealing were performed to prove the thermal and chemical stability of the Ru-Zr alloy film. Negligible changes in the accumulated capacitance and work function before and after annealing were observed. Sheet resistance of Ru-Zr alloy was lower than that of poly-silicon. It can be concluded that the Ru-Zr alloy can be a possible substitute for the poly-silicon used as a gate of nMOS.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.11a
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• pp.476-479
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• 2000

In this study, mesh-type PECVD system was suggested to minimize the hydrogen concentration. The main structural difference between the triode system and a conventional system is that a mesh was attached to the substrate holding electrode. We investigated several conditions to compare with conventional PECVD. The main effect of mesh was to minimize the substrate damage by ion bombardment and to enhance the surface reaction to induce hydrogen desorption. It was also found that hydrogen concentration decreased but deposition rate increased as increasing applied dias. Applied DC bias enhanced sputtering process. Intense ion bombardment causes the weakly bonded hydrogen or hydrogen-containing species to leave the growing film and increased adatom mobility. Furthermore, addition of hydrogen gas enhance the surface diffusion of adatom. The structural properties of poly-Si films were analyzed by scanning electron microscopy(SEM).

• Journal of Sensor Science and Technology
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• v.20 no.4
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• pp.260-265
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• 2011

The silicon vertical hall devices are fabricated using a modified bipolar process. It consists of the thin p-layer at Si-$SiO_2$, interface and n-epi layer without $n^+$buried layer to improve the sensitivity and influence of interface effects. Experimental samples are a sensor type I with and type H without p+isolation dam adjacent to the center current electrode. The experimental results for both type show a more high current-related sensitivity than the former's vertical hall devices. The sensitivity of type H and type I are about 150 V/AT and 340 V/AT, respectively. This sensor's behavior can be explained by the similar J-FET model.

• Journal of the Korean Society for Precision Engineering
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• v.25 no.6
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• pp.80-91
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• 2008

Electrostatic forces have an advantage of directly levitating not only non-ferromagnetic metals but also semiconductors, such as silicon wafers, and dielectric materials like glass. This paper describes the characteristics of electrostatic forces and electrostatic suspension system, followed by the basic principle of 1-DOF(degree of freedom) electrostatic suspension system, and the structures of electrodes-for-suspension and voltage supplying methods to the electrodes in 1-DOF model. This paper also discuss about the minimum number of electrodes needed to control n-DOF motion of the suspended object and represents some desirable electrode patterns to stabilize the 6-DOF motion of the object. In the near future, electrostatic suspension system is expected to be applied to industrial manufacturing processes, for example, to the manufacture of semiconductor devices and/or flat panel display devices.

• New & Renewable Energy
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• v.4 no.2
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• pp.74-80
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• 2008

To improve the blue responses of screen-printed single crystalline silicon solar cells, we investigated an emitter etch-back technique to obtain high emitter sheet resistances, where the defective dead layer on the emitter surface was etched and became thinner as the etch-back time increased, resulting in the monotonous increase of short circuit current and open circuit voltage. We found that an optimal etch-back time should be determined to achieve the maximal performance enhancement because of fill factor decrease due to a series resistance increment mainly affected by contact and lateral resistance in this case. To elucidate the reason for the fill factor decrease, we studied the resistance analysis by potential mapping to determine the contact and the lateral series resistance. As a result, we found that the fill factor decrease was attributed to the relatively fast increase of contact resistance due to the dead layer thinning down with the lowest contact resistivity when the emitter was contacted with screen-printed silver electrode.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.19 no.7
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• pp.636-643
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• 2006

Si-C materials were synthesized by the heating the mixture of silicon and polyvinylidene fluoride (PVDF). The electrochemical properties of the Si-C materials as the high capacitive anode materials of lithium secondary batteries were evaluated by the galvanostatic charge-discharge test through 2032 type $Si-C{\mid}Li$ coin cells. Charge-discharge tests were performed at C/10 hour rate(C = 372 mAh/g). Initial discharge and charge capacities of $Si-C{\mid}Li$ cell using a Si-C material derived from PVDF(20wt.%) were found to be 1,830 and 526 mAh/g respectively. The initial discharge-charge characteristics of the developed Si-C electrode were analyzed by the electrochemical galvanostatic test adopting the capacity limited charge cut-off condition(GISOC). The range of reversible specific capacity IIE(intercalation efficiency at initial discharge-charge) and IICs(surface irreversible specific capacity) were 216 mAh/g, 68 % and 31 mAh/g, respectively.