• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.1
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• pp.29-34
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• 2008

In this paper, we investigated electrical and physical characteristics of nickel silicide using rare-earth metals(Er, Yb, Tb, Dy), Incorporated Ytterbium into Ni-silicide is proposed to reduce work function of Ni-silicide for nickel silicided schottky barrier diode (Ni-silicided SBD). Nickel silicide makes ohmic-contact or low schottky barrier height with p-type silicon because of similar work function (${\phi}_M$) in comparison with p-type silicon. However, high schottky barrier height is formed between Ni-silicide and p-type substrate by depositing thin ytterbium layer prior to Ni deposition. Even though the ytterbium is deposited below nickel, ternary phase $Yb_xN_{1-x}iSi$ is formed at the top and inner region of Ni-silicide, which is believed to result in reduction of work function about 0.15 - 0.38 eV.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.11a
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• pp.269-270
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• 2005

A hybrid passivation method using parylene and silicon dioxide combination layer for a flexible organic light emitting diode (FOLED) was applied on a polycarbonate substrate. A parylene coating by vapor polymerization method is a highly effective passivation process for the FOLED, and it applies all top surface and the edges of the FOLED device. In order to minimize the permeation of moisture and oxygen from the top surface of the device, an additional layer of silicon dioxide was deposited over the parylene coated layer. It was found that the water vapor transmittance rate (WVTR) of parylene (15 m-in-thickness) / SiO2 (0.3$\mu$m-in-thickness) combination layers deposited on polycarbonate film was decreased under the value of 10-3 g/m2day. The FOLED with the hybrid passivation showed remarkably longer lifetime characteristics in the ambient conditions than the non-passivated FOLED. The lifetime of the passivated FOLED was 400 hours and it was more than ten times over the lifetime of the convectional non-passivated FOLED.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.697-705
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• 2014

A single chip Programmable AC to DC Power Converter, consisting of wide band gap SiC MOSFET and SiC diodes, has been proposed which converts high frequency ac voltage to a conditioned dc output voltage at user defined given power level. The converter has high conversion efficiency because of negligible reverse recovery current in SiC diode and SiC MOSFET. High frequency operation reduces the need of bigger size inductor. Lead inductors are enough to maintain current continuity. A complete electrical analysis, die area estimation and thermal analysis of the converter has been presented. It has been found that settling time and peak overshoot voltage across the device has reduced significantly when SiC devices are used with respect to Si devices. Reduction in peak overshoot also increases the converter efficiency. The total package substrate dimension of the converter circuit is only $5mm{\times}5mm$. Thermal analysis performed in the paper shows that these devices would be very useful for use as miniaturized power converters for load currents of up to 5-7 amp, keeping the package thermal conductivity limitation in mind. The converter is ideal for voltage requirements for sub-5 V level power supplies for high temperatures and space electronics systems.

• ETRI Journal
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• v.39 no.5
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• pp.746-755
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• 2017

In this paper, an electrostatic discharge (ESD) protection circuit is designed for use as a 12 V power clamp by using a parasitic-diode-triggered silicon controlled rectifier. The breakdown voltage and trigger voltage ($V_t$) of the proposed ESD protection circuit are improved by varying the length between the n-well and the p-well, and by adding $n^+/p^+$ floating regions. Moreover, the holding voltage ($V_h$) is improved by using segmented technology. The proposed circuit was fabricated using a $0.18-{\mu}m$ bipolar-CMOS-DMOS process with a width of $100{\mu}m$. The electrical characteristics and robustness of the proposed ESD circuit were analyzed using transmission line pulse measurements and an ESD pulse generator. The electrical characteristics of the proposed circuit were also analyzed at high temperature (300 K to 500 K) to verify thermal performance. After optimization, the $V_t$ of the proposed circuit increased from 14 V to 27.8 V, and $V_h$ increased from 5.3 V to 13.6 V. The proposed circuit exhibited good robustness characteristics, enduring human-body-model surges at 7.4 kV and machine-model surges at 450 V.

• Electrical & Electronic Materials
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• v.8 no.6
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• pp.737-743
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• 1995

Two step RTD(Rapid Thermal Diffussion) of P into silicon wafer using tungsten halogen lamp was used to fabricated very shallow n$^{+}$p junction. 1st RTD was performed in the temperature range of 800.deg. C for 60 see and the heating rate was in the 50.deg. C/sec. Phosphrous solid source was transfered on the silicon surface. 2nd RTD process was performed in the temperature range 1050.deg. C, 10sec. Using 2 step RTD we can obtain a shallow junction 0.13.mu.m in depth. After RTD, the Ti-silicide process was performed by the two step RTA(Rapid Thermal Annealing) to reduced the electric resistance and to improve the n$^{+}$p junction diode. The titanium thickness was 300.angs.. The condition of lst RTA process was 600.deg. C of 30sec and that of 2nd RTA process was varied in the range 700.deg. C, 750.deg. C, 800.deg. C for 10sec-60sec. After 2 step RTA, sheet resistance was 46.ohm../[]. Ti-silicide n+p junction diode was fabricated and I-V characteristics were measured.red.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.409-412
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• 2004

Edge termination technique is essential fer the fabrication of high volage devices. A proper edge termination technique is also needed in the fabrication of Silicon Carbide power devices for obtaining a stable high blocking voltage properties. Among the many techniques, the field plate formation is the easiest one that can utilize it for commercial usage. The growth of thick thermal oxide is difficult for SiC, however. In this paper, 6A grade SiC schottky barrier diodes(SBD) were fabricated with field plate edge termination. The oxides which is field plate were formed various methods such as dry oxidation, 10% $N_2O$ nitrided oxidation and PECVD deposition. The reverse characteristics of the SiC SBD with various oxide field plate were investigated.

• Transactions on Electrical and Electronic Materials
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• v.10 no.4
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• pp.143-145
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• 2009

The electrical and photovoltaic properties of single junction silicon quantum dot solar cells are investigated. A prototype solar cell with an effective area of 4.7 $mm^2$ showed an open circuit voltage of 394 mV and short circuit current density of 0.062 $mA/cm^2$. A diode model with series and shunt resistances has been applied to characterize the dark current-voltage data. The photocurrent of the quantum-dot solar cell was found to be strongly dependent on the applied voltage bias, which can be understood by consideration of the conduction mechanism of the activated carriers in the quantum dot imbedded material.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.413-418
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• 2006

Highly stable thin-film transistor (TFT) pixel employing both low temperature polycrystalline silicon (LTPS) and amorphous silicon (a-Si) for active matrix organic light emitting diode (AMOLED) is discussed. ELA (excimer laser annealing) LTPS-TFT pixel should compensate $I_{OLED}$ variation caused by the non-uniformity of LTPS-TFT due to the fluctuation of excimer laser energy and amorphous silicon TFT pixel is desired to suppress the decrease of $I_{OLED}$ induced by the degradation of a-Si TFT. We discuss various compensation schemes of both LTPS and a-Si TFT employing the voltage and the current programming.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.11
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• pp.963-968
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• 2002

In this work, porous silicon (PS) layer is investigated as a sensing material to detect organic vapors such as ethanol (called alcohol), methanol, and acetone in low concentrations. To do this, PS sensors were fabricated. They have a membrane structure and comb-type electrodes were used to detect the change of electrical resistance effectively. PS layer on Si substrates was formed by anodization in HF solution of 25%. From fabricated sensors, current-voltage (Ⅰ-Ⅴ) curves were measured for gases evaporated from 0.1 to 0.5% organic solution concentrations at 36$\^{C}$. As the result, all curves showed rectifying behavior due to a diode structure between Si and the PS layer. The conductance of most sensors increased largely at high voltage of 5V, but the built-in potential on the measured Ⅰ-Ⅴ curve was lowered inversely by the adsorption effect of the organic vapors with high dipole moment.

• Korean Journal of Materials Research
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• v.3 no.5
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• pp.482-496
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• 1993

Radiation damage and contamination of silicons etched in the $CF_4+H_2$ and $CHF_3$ magnetron discharges have been characterized using Schottky diode characteristics, TEM, AES, and SIMS as a function of applied magnetic field strength. It turned out that, as the magnetic field strength increased, the radiation damage measured by cross sectional TEM and by leakage current of Schottky diodes decreased colse to that of wet dtched samples especially for $CF_4$ plasma etched samples, For $CF_4+H_2$and $CHF_3$ etched samples, hydrogen from the plasmas introduced extended defects to the silicon and this caused increased leakage current to the samples etched at low magnetic field strength conditions by hydrogen passivation. The thickness of polymer with the increasing magnetic field strength and showed the minimum polymer residue thickness near the 100Gauss where the silicon etch rate was maximum. Also, other contaminants such as target material were found to be minimum on the etched silicon surface near the highest etch rate condition.