• Title/Summary/Keyword: sequential design

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Design Methodologies for Reliable Clock Networks

  • Joo, Deokjin;Kang, Minseok;Kim, Taewhan
    • Journal of Computing Science and Engineering
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    • v.6 no.4
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    • pp.257-266
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    • 2012
  • This paper overviews clock design problems related to the circuit reliability in deep submicron design technology. The topics include the clock polarity assignment problem for reducing peak power/ground noise, clock mesh network design problem for tolerating clock delay variation, electromagnetic interference aware clock optimization problem, adjustable delay buffer allocation and assignment problem to support multiple voltage mode designs, and the state encoding problem for reducing peak current in sequential elements. The last topic belongs to finite state machine (FSM) design and is not directly related to the clock design, but it can be viewed that reducing noise at the sequential elements driven by clock signal is contained in the spectrum of reliable circuit design from the clock source down to sequential elements.

Sequential Design of Experiment Based Topology Optimization (순차적 실험계획법을 이용한 위상 최적 설계)

  • Song, Chi-Oh;Park, Soon-Ok;Yoo, Jeong-Hoon
    • Transactions of the Society of Information Storage Systems
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    • v.3 no.4
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    • pp.178-182
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    • 2007
  • Topology optimization methods are classified into two methods such as the density method and the homogenization method. Those methods need to consider relationships between the material property and the density of each element in a design domain, the relaxation of the design space, etc. However, it is hard to apply on some cases due to the complexity to compose the design objective and its sensitivity analysis. In this paper, a modified topology optimization is proposed to assist designers who do not have mathematical or theoretical background of the topology optimization. In this study, optimal topology of structures can be achieved by the sequential design of experiment (DOE) and the sensitivity analysis. We conducted the DOE with an orthogonal array and the sensitivity analysis of design variables to determine sensitive variables used for connectivity between elements. The modified topology optimization method has advantages such as freedom from penalizing intermediate values and easy application with basic DOE concept.

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A Study on Design Method of Sequential Landscape through the Application of Visual Structure and Screening Techniques of Film Art (영화의 시각적 구조와 표현기법의 응용을 통한 연속적 경관의 설계방법에 관한 연구)

  • 우대준;김영대
    • Journal of the Korean Institute of Landscape Architecture
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    • v.23 no.4
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    • pp.97-110
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    • 1996
  • This study is about the application of visual structure and presentation of film as one of new methods for design of sequential landscape. The primary objective of the study is to present the basis of applicable and reasonable D니. In applying components of film to DSL, if it is compared with sequential landscape, the film is collection of shots while sequential landscape is accumulation of sceneries. Film and sequential landscape give us a whole meaning different from the meaning itself of a shot or scenery in its experience. The study build a tentative technique of DSL which has the following stages : 1) Goal setting and making out a scenario 2) Analysis and investigation 3) Selection process of definite form 4) Drawing up conti., sketch and notes, It is expected that the technique presented in this study could be a basis for further study of DSL.

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Design for Sequential Control System Using Petri Nets with Hierarchical Expression (II) -composition of Sub Petri nets by Bottom up Oriented Method- (페트리네트의 계층화를 통한 시퀀스제어계의 설계(II) -Bottom up에 의한 서브PN의 합성-)

  • 정석권;정영미;유삼상
    • Journal of Ocean Engineering and Technology
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    • v.15 no.4
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    • pp.108-114
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    • 2001
  • Petri nets have been introduced as a powerful analyzing and design tool for the discrete systems such as sequential control systems. However, one of the important problems in its applications is that the model can be analyzed hardly when we deal with large scale systems because of increase of the number of Petri net components. To overcome this problem, some methods for dividing or reducing of Petri net have been suggested. In this paper, an approach for hierarchical expression of Petri net based on Sequential function Chart(SFC) and Bottom Up oriented Mehodology(BUM) is proposed. Especially, some definitions and rules are defined in order to divide and compose sub Petri nets. A measuring tank system will be described as a typical kind of discrete systems and modeled by some sub Petri nets based on the SFC and BUM by the proposed method in this paper.

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Design for Sequential Control System Using Petri Nets with Hierarchical Expession(II) - Composition of Sub Petri nets by Bottom up Oriented Method- (페트리네트의 계층화를 통한 시퀀스제어계의 설계 (II) - Bottom up에 의한 서브PN의 분할과 합성 -)

  • 정석권;정영미;유삼상
    • Proceedings of the Korea Committee for Ocean Resources and Engineering Conference
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    • 2001.05a
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    • pp.26-31
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    • 2001
  • Petri nets(PN) have been introduced as a poweful analyzing and design tool for the discrete systems such as sequential control systems. However, one of the important problems in its applications is that the model can not be analyzed easily when we deal with large scale systems because of increase of the number of components of the systems. To overcome this problem, some methods for dividing or reducing of PN have been suggested. In this paper, an approach for hierarchical expression of PN based on Sequential Function Chart(SFC) and Bottom Up oriented Mehodology(BUM) is proposed. Especially, some definition and rules are defined in order to divide and compose sub PN. A measuring tank system will be described as a typical kind of discrete systems and modeled by some sub PN based on the SFC and BUM by the proposed method in this paper.

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Computer Aided Design of Sequential Logic Circuits (Case of Synchronous Sequential Logic Circuits) (컴퓨터를 이용한 순차 논리 회로의 설계 (동기식 순차 논리 회로의 경우))

  • 김경식;조동섭;황희영
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.33 no.4
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    • pp.134-139
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    • 1984
  • This paper presents the computer program to design the synchronous sequential logic circuit. The computer program uses the MASK method to get the circuit of optimal cost. The computer program takes as an input, the minimal reduced state transition table where each state has its internal code. As an output,the optimal design of synchronous sequential logic circuit is generated for each flipflop type of JK,T,D, and RS respectively. And these circuits for 4 flipflop types are evaluated and sorted in ascending order of their costs, so that the user can select the proper flipflop type and its circuit. Furthermore,the proposed computer program may be applied to state assignment with its facility of cost evaluation.

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On the Bayes risk of a sequential design for estimating a mean difference

  • Sangbeak Ye;Kamel Rekab
    • Communications for Statistical Applications and Methods
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    • v.31 no.4
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    • pp.427-440
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    • 2024
  • The problem addressed is that of sequentially estimating the difference between the means of two populations with respect to the squared error loss, where each population distribution is a member of the one-parameter exponential family. A Bayesian approach is adopted in which the population means are estimated by the posterior means at each stage of the sampling process and the prior distributions are not specified but have twice continuously differentiable density functions. The main result determines an asymptotic second-order lower bound, as t → ∞, for the Bayes risk of a sequential procedure that takes M observations from the first population and t - M from the second population, where M is determined according to a sequential design, and t denotes the total number of observations sampled from both populations.

An Optimal State-Code Assignment Algorithm of Sequential Circuits for VLSI Design Automation Systems (VLSI 설계자동화 시스템을 위한 순서회로의 최적상태코드 할당 알고리듬)

  • Lim, Jae-Yun;Lim, In-Chil
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.1
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    • pp.104-112
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    • 1989
  • A design automation method for sequential circuits implementation by mans of PLA is discussed, and an optimal state-code assignment algorithm to minimize the PLA area is proposed. In order to design sequential circuit automatically, DASL (Design Automation Support Language) [8] which is easy to describe and powerful to synthesize, is proposed and used to describe sequential circuit, An optimal statecode assignment algorithm which considers next states and outputs simultaneously is proposed, and by adopting this algorithm to various examples, the area of PLA is reduced by 10% comparing privious methods. This system is constructed to design microinstruction, FSM, VLSI control part synthesis.

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Global Optimization Using a Sequential Algorithm with Orthogonal Arrays in Discrete Space (이산공간에서 순차적 알고리듬(SOA)을 이용한 전역최적화)

  • Cho Bum-Sang;Yi Jeong-Wook;Park Gyung-Jin
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.29 no.10 s.241
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    • pp.1369-1376
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    • 2005
  • In structural design, the design variables are frequently selected from certain discrete values. Various optimization algorithms have been developed fDr discrete design. It is well known that many function evaluations are needed in such optimization. Recently, sequential algorithm with orthogonal arrays (SOA), which is a search algorithm for a local minimum in a discrete space, has been developed. It considerably reduces the number of function evaluations. However, it only finds a local minimum and the final solution depends on the initial values of the design variables. A new algorithm is proposed to adopt a genetic algorithm (GA) in SOA. The GA can find a solution in a global sense. The solution from the GA is used as the initial design of SOA. A sequential usage of the GA and SOA is carried out in an iterative manner until the convergence criteria are satisfied. The performance of the algorithm is evaluated by various examples.

Development of Optimization Algorithm for Unconstrained Problems Using the Sequential Design of Experiments and Artificial Neural Network (순차적 실험계획법과 인공신경망을 이용한 제한조건이 없는 문제의 최적화 알고리즘 개발)

  • Lee, Jung-Hwan;Suh, Myung-Won
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.32 no.3
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    • pp.258-266
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    • 2008
  • The conventional approximate optimization method, which uses the statistical design of experiments(DOE) and response surface method(RSM), can derive an approximated optimum results through the iterative process by a trial and error. The quality of results depends seriously on the factors and levels assigned by a designer. The purpose of this study is to propose a new technique, which is called a sequential design of experiments(SDOE), to reduce a trial and error procedure and to find an appropriate condition for using artificial neural network(ANN) systematically. An appropriate condition is determined from the iterative process based on the analysis of means. With this new technique and ANN, it is possible to find an optimum design accurately and efficiently. The suggested algorithm has been applied to various mathematical examples and a structural problem.