• 제목/요약/키워드: sequential design

검색결과 909건 처리시간 0.022초

Design of ferromagnetic shims for an HTS NMR magnet using sequential search method

  • Yang, Hongmin;Lee, SangGap;Ahn, Minchul
    • 한국초전도ㆍ저온공학회논문지
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    • 제23권4호
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    • pp.39-43
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    • 2021
  • This study deals with the ferromagnetic shims design based on the spherical harmonic coefficient reduction method. The design method using the sequential search method is an intuitive method and has the advantage of quickly reaching the optimal result. The study was conducted for a 400 MHz all-REBCO magnet, which had difficulty in shimming due to the problem of SCF (screening current induced field). The initial field homogeneity of the magnet was measured to be 233.76 ppm at 20 mm DSV (Diameter Spherical Volume). In order to improve the field homogeneity of the magnet, the ferromagnetic shim with a thickness of 1 mil to 11 mil was constructed by a design method in which sequential search algorithm was applied. As a result, the field homogeneity of the magnet could be significantly improved to 0.24 ppm at 20 mm DSV and 0.05 ppm at 10 mm DSV.

테스트가 용이한 CMOS 순서 PLA의 설계 (Design of Easily Testable CMOS Sequential PLAs)

  • 이종천;임재윤;한석붕;홍인식;임인칠
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1987년도 전기.전자공학 학술대회 논문집(II)
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    • pp.1507-1511
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    • 1987
  • This paper proposes a NAND-NAND logic sequential Programmable Logic Array (PLA) using CMOS technology, and test generation methods about stuck-open faults. By using LSSD (Level Sensitive Scan Design) method instead of Flip-Flops in Sequential PLA, the complex test problems of sequential logic are simplified. After generating the test sets using connection graph, regular test sequences and all transistor faults detection method in PLA are proposed. Finally, by programming these algorithms in PASCAL at VAX 8700 and adopting these to pratical CMOS Sequential PLA circuits, we proved the effectiveness of this design.

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제 3상 임상시험에서 표본수 결정

  • 남정모
    • 한국응용약물학회:학술대회논문집
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    • 한국응용약물학회 1995년도 제3회 추계심포지움
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    • pp.73-78
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    • 1995
  • 표본수를 결정하는 방법에는 크게 sequential design과 fixed sample size design이 있다. Fixed sample size design은 연구를 시행하기 전에 표본수를 합리적으로 결정하고 정해진 표본내에서 연구를 진행하는 방법이며, sequential design은 연구를 진행하면서 결과의 차이가 있는가 또는 없는가에 대해 미리 정해진 한계영역을 기준으로 계속적으로 연구대상을 추출하여 연구를 진행하는 방법이다. 여기서는 많이 사용되는 fixed sample size design에 대해서만 생각하기로 한다.

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Augmented D-Optimal Design for Effective Response Surface Modeling and Optimization

  • Kim, Min-Soo;Hong, Kyung-Jin;Park, Dong-Hoon
    • Journal of Mechanical Science and Technology
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    • 제16권2호
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    • pp.203-210
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    • 2002
  • For effective response surface modeling during sequential approximate optimization (SAO), the normalized and the augmented D-optimality criteria are presented. The normalized D-optimality criterion uses the normalized Fisher information matrix by its diagonal terms in order to obtain a balance among the linear-order and higher-order terms. Then, it is augmented to directly include other experimental designs or the pre-sampled designs. This augmentation enables the trust region managed sequential approximate optimization to directly use the pre-sampled designs in the overlapped trust regions in constructing the new response surface models. In order to show the effectiveness of the normalized and the augmented D-optimality criteria, following two comparisons are performed. First, the information surface of the normalized D-optimal design is compared with those of the original D-optimal design. Second, a trust-region managed sequential approximate optimizer having three D-optimal designs is developed and three design problems are solved. These comparisons show that the normalized D-optimal design gives more rotatable designs than the original D-optimal design, and the augmented D-optimal design can reduce the number of analyses by 30% - 40% than the original D-optimal design.

Accuracy of Brownian Motion Approximation in Group Sequential Methods

  • Euy Hoon Suh
    • Communications for Statistical Applications and Methods
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    • 제6권1호
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    • pp.207-220
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    • 1999
  • In this paper, some of the issue about a group sequential method are considered in the Bayesian context. The continuous time optimal stopping boundary can be used to approximate the optimal stopping boundary for group sequential designs. The exact stopping boundary for group sequential design is obtained by using the backward induction method and is compared with the continuous optimal stopping boundary and the corrected continuous stopping boundary.

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축차경매의 평형입찰전략과 최적경매설계 (Equilibrium Bidding Strategy and Optimal Auction Design of Sequential Auction)

  • 김여근;박순달
    • 한국국방경영분석학회지
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    • 제14권1호
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    • pp.63-83
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    • 1988
  • This study is concerned with the equilibrium bidding strategy and the optimal auction design of sequential auction with a reserve price and an entry fee. It is assumed that each bidder has a fixed reservation value and draws the reservation values of other bidders independently in the same distribution and may obtain at most one object to be sold. Under such assumptions, the sequential auction will be analyzed by the game theoretic approach. The purpose of this paper is, in the sequential auction, to find the equilibrium bidding strategy and to design the optimal auction under the equilibrium bidding strategy. The equilibrium bidding strategy and the optimal auction design are further analyzed with respect to change of the reserve price, the entry fee, and the number of bidders and objects. Specially, the auctioneer's expected revenue for each auction is obtained and analyzed.

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축차경매의 평형입찰전략과 최적경매설계 (Equilibrium Bidding Strategy and Optimal Auction Design of Sequential Auction)

  • 김여근;박순달
    • 한국국방경영분석학회지
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    • 제13권2호
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    • pp.63-83
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    • 1987
  • This study is concerned with the equilibrium bidding strategy and the optimal auction design of sequential auction with a reserve price and an entry fee. It is assumed that each bidder has a fixed reservation value and draws the reservation values of other bidders independently in the same distribution and may obtain at most one object to be sold. Under such assumptions, the sequential auction will be analyzed by the game theoretic approach. The purpose of this paper is, in the sequential auction, to find the equilibrium bidding strategy and to design the optimal auction under the equilibrium bidding strategy. The equilibrium bidding strategy and the optimal auction design are further analyzed with respect to change of the reserve price, the entry fee, and the number of bidders and objects. Specially, the auctioneer's expected revenue for each auction is obtained and analyzed.

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Design and Implementation of a Sequential Polynomial Basis Multiplier over GF(2m)

  • Mathe, Sudha Ellison;Boppana, Lakshmi
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제11권5호
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    • pp.2680-2700
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    • 2017
  • Finite field arithmetic over GF($2^m$) is used in a variety of applications such as cryptography, coding theory, computer algebra. It is mainly used in various cryptographic algorithms such as the Elliptic Curve Cryptography (ECC), Advanced Encryption Standard (AES), Twofish etc. The multiplication in a finite field is considered as highly complex and resource consuming operation in such applications. Many algorithms and architectures are proposed in the literature to obtain efficient multiplication operation in both hardware and software. In this paper, a modified serial multiplication algorithm with interleaved modular reduction is proposed, which allows for an efficient realization of a sequential polynomial basis multiplier. The proposed sequential multiplier supports multiplication of any two arbitrary finite field elements over GF($2^m$) for generic irreducible polynomials, therefore made versatile. Estimation of area and time complexities of the proposed sequential multiplier is performed and comparison with existing sequential multipliers is presented. The proposed sequential multiplier achieves 50% reduction in area-delay product over the best of existing sequential multipliers for m = 163, indicating an efficient design in terms of both area and delay. The Application Specific Integrated Circuit (ASIC) and the Field Programmable Gate Array (FPGA) implementation results indicate a significantly less power-delay and area-delay products of the proposed sequential multiplier over existing multipliers.

Accelerating Group Fusion for Ligand-Based Virtual Screening on Multi-core and Many-core Platforms

  • Mohd-Hilmi, Mohd-Norhadri;Al-Laila, Marwah Haitham;Hassain Malim, Nurul Hashimah Ahamed
    • Journal of Information Processing Systems
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    • 제12권4호
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    • pp.724-740
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    • 2016
  • The performance issues of screening large database compounds and multiple query compounds in virtual screening highlight a common concern in Chemoinformatics applications. This study investigates these problems by choosing group fusion as a pilot model and presents efficient parallel solutions in parallel platforms, specifically, the multi-core architecture of CPU and many-core architecture of graphical processing unit (GPU). A study of sequential group fusion and a proposed design of parallel CUDA group fusion are presented in this paper. The design involves solving two important stages of group fusion, namely, similarity search and fusion (MAX rule), while addressing embarrassingly parallel and parallel reduction models. The sequential, optimized sequential and parallel OpenMP of group fusion were implemented and evaluated. The outcome of the analysis from these three different design approaches influenced the design of parallel CUDA version in order to optimize and achieve high computation intensity. The proposed parallel CUDA performed better than sequential and parallel OpenMP in terms of both execution time and speedup. The parallel CUDA was 5-10x faster than sequential and parallel OpenMP as both similarity search and fusion MAX stages had been CUDA-optimized.

접속 행렬을 이용한 순차 시스템 제어기 설계 (Design of Sequential System Controller Using Incidence Matrix)

  • 전호익;류창근;우광준
    • 조명전기설비학회논문지
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    • 제12권1호
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    • pp.85-92
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    • 1998
  • 본 논문에서는 페트리 네트로 記述된 제어 사양을 접속 행렬로 해석한 후, 그 결과를 근거로 병렬 시퀸스의 수행이 가능한 순차 시스템 제어기(Sequential System Controller)를 설계하였다. 순차 시스템 제어기는 입력 처리부, 그리고 점화 처리부와 토큰 제어기로 구성된 페트리 네트 제어기로 구성된다. 입력 처리부에서는 입력 신호를 선택하여 점화 처리부로 전달하며, 점화 처리부는 토큰 운전기의 토큰 상태에 따라서 입력된 신호의 점화 여부를 판단하게 된다. 제안된 제어기는 제어 사양의 변경시 접속 행렬을 저장한 롬의 내용 변경만으로 제어기의 변경이 가능하고, 페트리 네트 제어기의 모듈화가 가능하여 기능의 확장이 용이하므로 자동창고 시스템, 반송 시스템, 및 승강기 시스템과 같은 순차 시스템 제어기의 개발 및 실현을 용이하게 할 수 있다.

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