• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2008.05a
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• pp.525-527
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• 2008

N-Type $SbI_3$-doped $95%{Bi_2}{Te_3}-5%{Bi_2}{Se_3}$ compounds were prepared by a gas atomization and Magnetic Pulsed Compaction process. The dynamic recrystallization and thermoelectric properties of the MPCed bulks with consolidation temperatures and times were investigated by a combination of microscopy, XRD and thermoelectric property testing. The microstructure of MPCed bulk shows homogeneous and fine distribution through consolidated bulks due to dynamic recrystallization during hot MPC. This research presented the challenges toward the successful consolidation of thermoelectric powder using magnetic pulsed compaction (MPC).

• Bulletin of the Korean Chemical Society
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• v.21 no.8
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• pp.805-808
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• 2000

Mixed crystal powders based on Cd,Fe, and S have been synthesized by varying the ratio of CdS and $FeS_2in$ order to find a suitable material usefuI for the effectivc conversion of solar energy. Hydrogen gas was evolved only with CdS/Ptby photocatal ytic reaction under white light in an aqueous 1 M sodiumsulfite solution. From electrochemical studies of semiconductor electrodes. itwas shown that the onset potential shifted to the positive direction and that the bandgap energy also decreased as the molar ratio of Fe increased. A hydrogen evolution mechanism in terms of the conduction band potential and hydrogen evolution potential is proposed.

• Electronics and Telecommunications Trends
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• v.33 no.6
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• pp.1-11
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• 2018

Several industrial applications such as space exploration, aerospace, automotive, the downhole oil and gas industry, and geothermal power plants require specific electronic systems under extremely high temperatures. For the majority of such applications, silicon-based technologies (bulk silicon, silicon-on-insulator) are limited by their maximum operating temperature. Silicon carbide (SiC) has been recognized as one of the prime candidates for providing the desired semiconductor in extremely high-temperature applications. In addition, it has become particularly interesting owing to a Si-compatible process technology for dedicated devices and integrated circuits. This paper briefly introduces a variety of SiC-based integrated circuits for use under extremely high temperatures and covers the technology trend of SiC CMOS devices and processes including the useful implementation of SiC ICs.

• Journal of Power Electronics
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• v.19 no.3
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• pp.714-726
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• 2019

This paper proposes a hybrid-boost Modular Multilevel Converter (MMC) for the Medium-Voltage (MV) Variable Speed Drives (VSDs) employed in subsea applications, such as oil and gas recovery. In the presented architecture, a hybrid-boost MMC with a reduced number of semiconductor devices driving a multiphase Induction Machine (IM) is investigated. The stepped output voltage generated by the MMC reduces or eliminates the filtering requirements. Moreover, the boosting capability of the proposed architecture eliminates the need for bulky low-frequency transformers at the converter output terminals. A detailed illustration of the hybrid-boost MMC operation, the expected limitations/constraints, and the voltage balancing technique are presented. A simulation model of the proposed MV hybrid-boost MMC-based five-phase IM drive has been built to investigate the system performance. Finally, a downscaled prototype has been constructed for experimental verification.

• IEIE Transactions on Smart Processing and Computing
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• v.3 no.5
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• pp.331-337
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• 2014

Ge is becoming an increasingly popular semiconductor material with high Si compatibility for on-chip optical interconnect technology. For a better manifestation of the meritorious material properties of Ge, its surface treatment should be performed satisfactorily before the electronic and photonic components are fabricated. Ex-situ rapid thermal annealing (RTA) processes with different gases were carried out to examine the effects of the annealing gases on the thin-film quality of Ge grown epitaxially on Si substrates. The Ge-on-Si samples were prepared in different structures using the same equipment, reduced-pressure chemical vapor deposition (RPCVD), and the samples annealed in $N_2$, forming gas (FG), and $O_2$ were compared with the unannealed (deposited and only cleaned) samples to confirm the improvements in Ge quality. To evaluate the thin-film quality, room-temperature photoluminescence (PL) measurements were performed. Among the compared samples, the $O_2$-annealed samples showed the strongest PL signals, regardless of the sample structures, which shows that ex-situ RTA in the $O_2$ environment would be an effective technique for the surface treatment of Ge in fabricating Ge devices for optical computing systems.

• Korean Journal of Materials Research
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• v.19 no.2
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• pp.90-94
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• 2009

The development of low-k materials is essential for modern semiconductor processes to reduce the cross-talk, signal delay and capacitance between multiple layers. The effect of the $CH_4$ concentration on the formation of SiOC(-H) films and their dielectric characteristics were investigated. SiOC(-H) thin films were deposited on Si(100)/$SiO_2$/Ti/Pt substrates by plasma-enhanced chemical vapor deposition (PECVD) with $SiH_4$, $CO_2$ and $CH_4$ gas mixtures. After the deposition, the SiOC(-H) thin films were annealed in an Ar atmosphere using rapid thermal annealing (RTA) for 30min. The electrical properties of the SiOC(-H) films were then measured using an impedance analyzer. The dielectric constant decreased as the $CH_4$ concentration of low-k SiOC(-H) thin film increased. The decrease in the dielectric constant was explained in terms of the decrease of the ionic polarization due to the increase of the relative carbon content. The spectrum via Fourier transform infrared (FT-IR) spectroscopy showed a variety of bonding configurations, including Si-O-Si, H-Si-O, Si-$(CH_3)_2$, Si-$CH_3$ and $CH_x$ in the absorbance mode over the range from 650 to $4000\;cm^{-1}$. The results showed that dielectric properties with different $CH_4$ concentrations are closely related to the (Si-$CH_3$)/[(Si-$CH_3$)+(Si-O)] ratio.

• Electrical & Electronic Materials
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• v.9 no.8
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• pp.789-798
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• 1996

The double nitride layer Metal Nitride Oxide Semiconductor(MNOS) structures were fabricated by variating both gas ratio and nitride thickness, and by duplicating nitride deposited and one nitride layer MNOS structure to improve nonvolatile memory characteristics of MNOS structures by Low Pressure Chemical Vapor Deposition(LPCVD) method. The nonvolatile memory characteristics of write-in, erase, memory retention and degradation of Bias Temperature Stress(BTS) were investigated by the homemade automatic .DELTA. $V_{FB}$ measuring system. In the trap density double nitride layer structures were higher by 0.85*10$^{16}$ $m^{-2}$ than one nitride layer structure, and the AVFB with oxide field was linearly increased. However, one nitride layer structure was linearly increased and saturated above 9.07*10$^{8}$ V/m in oxide field. In the erase behavior, the hole injection from silicon instead of the trapped electron emission was observed, and also it was highly dependent upon the pulse amplitude and the pulse width. In the memory retentivity, double nitrite layer structures were superior to one nitride layer structure, and the decay rate of the trapped electron with increasing temperature was low. At increasing the number on BTS, the variance of AVFB of the double nitride layer structures was smaller than that of one nitride layer structure, and the trapped electron retention rate was high. In this paper, the double nitride layer structures were turned out to be useful in improving the nonvolatile memory characteristics.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2006.10a
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• pp.68-71
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• 2006

Multi-component $ZnO-In_2O_3-SnO_2$ thin films have been prepared by RF magnetron co-sputtering using targets composed of $In_3Sn_4O_{12}$(99.99%) [1] and ZnO(99.99%) at room temperature. $In_3Sn_4O_{12}$ contains less In than commercial ITO, so that it lowers cost. Working pressure was held at 3 mtorr flowing Ar gas 20 sccm and sputtering time was 30 min. RF power ratio [RF1 / (RFI + RF2)] of two guns in sputtering system was varied from 0 to 1. Each RF power was varied $0{\sim}100W$ respectively. The thickness of the films was $350{\sim}650nm$. The composit ion concentrations of the each film were measured with EPMA, AES and XPS. The low resistivity of $1-2\;{\times}\;10^3$ and an average transmittance above 80% in the visible range were attained for the films over a range of ${\delta}\;(0.3\;{\leq}\;{\delta}\;{\leq}\;0.5)$. The films also showed a high chemical stability with time and a good uniformity.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2007.06a
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• pp.193-198
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• 2007

The NiSi is very promising candidate for the metallization in 60nm CMOS process such as FUSI(fully silicided) gate and source/drain contact because it exhibits non-size dependent resistance, low silicon consumption and mid-gap workfunction. Ni film was first deposited by using ALD (atomic layer deposition) technique with Bis-Ni precursor and $H_2$ reactant gas at $220^{\circ}C$ with deposition rate of $1.25{\AA}/cycle$. The as-deposited Ni film exhibited a sheet resistance of $5{\Omega}/{\square}$. RTP (repaid thermal process) was then performed by varying temperature from $400^{\circ}C$ to $900^{\circ}C$ in $N_2$ ambient for the formation of NiSi. The process window temperature for the formation of low-resistance NiSi was estimated from $600^{\circ}C$ to $800^{\circ}C$ and from $700^{\circ}C$ to $800^{\circ}C$ with and without Ti capping layer. The respective sheet resistance of the films was changed to $2.5{\Omega}/{\square}$ and $3{\Omega}/{\square}$ after silicidation. This is because Ti capping layer increases reaction between Ni and Si and suppresses the oxidation and impurity incorporation into Ni film during silicidation process. The NiSi films were treated by additional thermal stress in a resistively heated furnace for test of thermal stability, showing that the film heat-treated at $800^{\circ}C$ was more stable than that at $700^{\circ}C$ due to better crystallinity.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.3
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• pp.185-190
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• 2015

In this study, we fabricated the indium gallium zinc oxide (IGZO), zinc oxide (ZnO), aluminum zinc oxide (AZO). oxide and silver are deposited by magnetron sputtering and thermal evaporator, respectively transparency and energy bandgap were changed by the thickness of silver layer. To fabricate metal oxide metal (OMO) structure, IGZO sputtered on a corning 1,737 glass substrate was used as bottom oxide material and then silver was evaporated on the IGZO layer, finally IGZO was sputtered on the silver layer we get the final OMO structure. The radio-frequency power of the target was fixed at 30 W. The chamber pressure was set to $6.0{\times}10^{-3}$ Torr, and the gas ratio of Ar was fixed at 25 sccm. The silver thickness are varied from 3 to 15 nm. The OMO thin films was analyzed using XRD. XRD shows broad peak which clearly indicates amorphous phase. ZnO, AZO, OMO show the peak [002] direction at $34^{\circ}$. This indicate that ZnO, AZO OMO structure show the crystalline peak. Average transmittance of visible region was over 75%, while that of infrared region was under 20%. Energy band gap of OMO layer was increased with increasing thickness of Ag layer. As a result total transmittance was decreased.