• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.11
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• pp.1111-1116
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• 2011

In this paper, a 60 GHz bidirectional active phase shifter with 130 nm CMOS is presented by replacing CMOS passive switchs in switched-line type phase shifter with Common Gate Amplifier(bidirectional amplifier). Bidirectional active phase shifter is composed of bidirectional amplifier blocks and passive delay line network blocks. The suitable topology of bidirectional amplifier block is CGA(Common Gate Amplifier) topology and matching circuits of input and output are symmetrical due to design same characteristic of it's forward and reverse way. The direction(forward and reverse way) and amplitude of amplification can be controlled by only one bias voltage($V_{DS}$) using combination bias circuit. And passive delay line network blocks are composed of microstrip line. An 1-bit phase shifter is fabricated by Dongbu HiTek 1P8M 130-nm CMOS technology and simulation results present -3 dB average insertion loss and respectively 90 degree and 180 degree phase shift at 60 GHz.

• Journal of the Korean Solar Energy Society
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• v.35 no.4
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• pp.67-75
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• 2015

PV module is conventionally connected in series with some solar cell to adjust the output of module. Some bypass diodes in module are installed to prevent module from hot spot and mismatch power loss. However, bypass diode in module exposed outdoor is easily damaged by surge voltage. In this paper, we study the thermal and electrical characteristics change of module with damaged bypass diode to easily find module with damaged bypass diode in photovoltaic system consisting of many modules. Firstly, the temperature change of bypass diode is measured according to forward and reverse bias current flowing through bypass diode. The maximum surface temperature of damaged bypass diode applied reverse bias is higher than that of normal bypass diode despite flowing equal current. Also, the output change of module with and without damaged bypass diode is observed. The output of module with damaged bypass diode is proportionally reduced by the total number of connected solar cells per one bypass diode. Lastly, the distribution temperature of module with damaged bypass diode is confirmed by IR camera. Temperature of all solar cells connected with damaged bypass diode rises and even hot spot of some solar cells is observed. We confirm that damaged bypass diodes in module lead to power drop of module, temperature rise of module and temperature rise of bypass diode. Those results are used to find module with a damaged bypass diode in system.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.5
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• pp.577-584
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• 2015

A photovoltaic (PV) system generates electricity by installing a solar energy array; therefore, the photovoltaic system can be easily exposed to external factors, which include environmental factors such as temperature, humidity, and radiation. These factors-as well as shading, in particular-lead to power degradation. When there is an output loss in the solar cell of a PV module package, the output loss is partly controlled by the bypass diode. As solar cells become highly efficient, the characteristics of series resistance and parallel resistance improve, and the characteristics of reverse voltage change. A bypass diode is connected in parallel to the string that is connected in series to the PV module. Ideally, the bypass diode operates when the voltage is -0.6[V] around. This study examines the bypass diode operating time for different types of crystalline solar cells. It compares the reverse voltage characteristics between the single solar cell and polycrystalline solar cell. Special modules were produced for the experiment. The shading rate of the solar cell in the specially made solar energy module was raised by 5% each time to confirm that the bypass diode was operating. The operation of the bypass diode is affected not only by the reverse voltage but also by the forward bias. This tendency was verified as the number of strings increased.

• Proceedings of the KIEE Conference
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• 1999.07d
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• pp.1931-1933
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• 1999

In this paper, the current and voltage properties on the gate oxide film due to the variation of thickness are studied. The specimen is used for n-ch power MOSFET. It is shows the leakage current and current density characteristics due to the applied electric field when the oxide thickness is each $600[\AA],\;800[\AA]$ and $1000[\AA]$, respectively. We known that the leakage current is a little higher when the voltage as reverse bias contrast with forward bias in poly gate is applied. In order to experiment for AC properties is measured for capacitance characteristics. It is confirmed that the value of input capacitance have been a lot of influenced on $SiO_2$ thickness contrast with the value of output capacitance.

• ETRI Journal
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• v.15 no.3
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• pp.61-69
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• 1994

A new analytical model for the base current of Si/SiGe/Si heterojunction bipolar transistors(HBTs) has been developed. This model includes the hole injection current from the base to the emitter, and the recombination components in the space charge region(SCR) and the neutral base. Distinctly different from other models, this model includes the following effects on each base current component by using the boundary condition of the excess minority carrier concentration at SCR boundaries: the first is the effect of the parasitic potential barrier which is formed at the Si/SiGe collector-base heterojunction due to the dopant outdiffusion from the SiGe base to the adjacent Si collector, and the second is the Ge composition grading effect. The effectiveness of this model is confirmed by comparing the calculated result with the measured plot of the base current vs. the collector-base bias voltage for the ungraded HBT. The decreasing base current with the increasing the collector-base reverse bias voltage is successfully explained by this model without assuming the short-lifetime region close to the SiGe/Si collector-base junction, where a complete absence of dislocations is confirmed by transmission electron microscopy (TEM)[1].The recombination component in the neutral base region is shown to dominate other components even for HBTs with a thin base, due to the increased carrier storage in the vicinity of the parasitic potential barrier at collector-base heterojunction.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.65-65
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• 2009

High temperature silicon carbide Schottky diode was fabricated with Au deposited on poly 3C-SiC thin film grown on p-type Si(100) using atmospheric pressure chemical vapor deposition. The charge transport mechanism of the diode was studied in the temperature range of 300 K to 550 K. The forward and reverse bias currents of the diode increase strongly with temperature and diode shows a non-ideal behavior due to the series resistance and the interface states associated with 3C-SiC. The charge transport mechanism is a temperature activated process, in which, the electrons passes over of the low barriers and in turn, diode has a large ideality factor. The charge transport mechanism of the diode was analyzed by a Gaussian distribution of the Schottky barrier heights due to the Schottky barrier inhomogeneities at the metal-semiconductor interface and the mean barrier height and zero-bias standard deviation values for the diode was found to be 1.82 eV and $s_0$=0.233 V, respectively. The interface state density of the diode was determined using conductance-frequency and it was of order of $9.18{\times}10^{10}eV^{-1}cm^{-2}$.

• Transactions on Electrical and Electronic Materials
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• v.14 no.4
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• pp.177-181
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• 2013

In this paper, silicon solar cells are analyzed regarding power conversion efficiency by changed capacitance in the depletion region. For the capacitance control in the depletion region of silicon solar cell was applied for 10, 20, 40, 80, 160 and 320 Hz frequency band character and alternating current(AC) voltage with square wave of 0.2~1.4 V. Academically, symmetry formation of positive and negative change of the p-n junction is similar to the physical effect of capacitance. According to the experiment result, because input of square wave with alternating current(AC) voltage could be observed to changed capacitance effect by indirectly method through non-linear power conversion (Voltage-Current) output. In addition, when input alternating current(AC) voltage in the silicon solar cell, changed capacitance of depletion region with the forward bias condition and reverse bias condition gave a direct effect to the charge mobility.

• Journal of the Korean Institute of Telematics and Electronics
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• v.5 no.2
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• pp.8-14
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• 1968

A linear current-pulse discriminator consisting: of a transistor monostable multivibrator and a Si tunnel diode is described. The input currant pulse range is about 50$\mu$A~5.23mA. The measured maximum linearity deviation is $\pm$0.75% in the input current pulse range mentioned above. The pulse resolving ability of the discriminator measured depends upon the bias current through the T, D. ; and, under the reverse bias current of 3mA, the resolving time is 2rs if allow the excess pulse amplitude of 5%. The threshold stability of the discriminator depends mainly upon the stability of the peak current Ip of the T. D. ; and, under the ambient temperature variation from $0^{\circ}C$ to 5$0^{\circ}C$, no bigger threshold variation than the maximum linearity deviation, i. e. $\pm$ 0.75%, was observed.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.10
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• pp.33-40
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• 1993

A reflection type 16x8 S-SEED array from LP(Low Pressure)-MODVD-grown GaAs/AlGaAs extremely shallow quantum well(ESQW) structures, with 4% Al fraction, has been fabricated. Its intrinsic region consists of 50 pairs of alternating 100.angs. GaAs and 100.angs. $Al_{0.04}$Ga$_{0.96}$As layers. A multilayer reflector stack of $Al_{0.04}$/Ga$_{0.96}$ As(599$\AA$)/AlAs(723$\AA$) was incorporated for the reflection plane below the p-i-n structures. The device processing after the MOCVD growth includes the mesa etching, isolation etching, insulator deposition, p & n metallization, and AR(Anti-Reflection) coating. For switching characteristics of the S-SEED in the form of p-i-n ESQW diode, the maximum optical negative resistance was observed at 856nm. Reflectance measurements showed a change from 15.6% to 43.3% for +0.9V to -6V bias. The maximum contrast ration of the S-SEED array was 2.0 and all the 128 devices showed optical bistability with contrast ratios over 2.4 at 5V reverse bias.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.1
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• pp.80-84
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• 2008

We systematically investigated the resistive switching properties of thin $TiO_2$ films on Pt/Ti/$SiO_2$/Si substrates that were embedded with a Co ultra thin layer. An in-situ sputtering technique was used to grow both films without breaking the chamber vacuum. A stable bipolar switching in the current-voltage curve was clearly observed in $TiO_2$ films with an embedded Co ultra thin layer, addressing the high and low resistive state under a bias voltage sweep. We propose that the underlying origin involved in the bipolar switching may be attributed to the interface redox reaction between the Co and $TiO_2$ layers. The improved reproducible switching properties of our novel structures under forward and reverse bias stresses demonstrated the possibility of future non-volatile memory elements in a simple capacitive-like structure.