• JSTS:Journal of Semiconductor Technology and Science
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• 제14권1호
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• pp.117-123
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• 2014

The fabrication and characterization of a Si/ZnO thin film heterojunction ultraviolet photodiode has been presented in this paper. ZnO thin film of ~100 nm thick was deposited on <100> Silicon (Si) wafer by atomic layer deposition (ALD) technique. The Photoluminescence spectroscopy confirms that as-deposited ZnO thin film has excellent visible-blind UV response with almost no defects in the visible region. The room temperature current-voltage characteristics of the n-ZnO thin film/p-Si photodiodes are measured under an UV illumination of $650{\mu}W$ at 365 nm in the applied voltage range of ${\pm}2V$. The current-voltage characteristics demonstrate an excellent UV photoresponse of the device in its reverse bias operation with a contrast ratio of ~ 1115 and responsivity of ~0.075 A/W at 2 V reverse bias voltage.

• Journal of Korean Vacuum Science & Technology
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• 제3권1호
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• pp.79-84
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• 1999

the photolithographic patterning on an indium-tin oxide (ITO) glass and the electro-phoretic deposition were combined for preparing the screen of the full-color field emission display(FED). the patterns with a pixel of 400$\mu\textrm{m}$ on the ITO-glass were made by etching the ITO with well-prepared etchant consisting of HCL, H2O, and HNO3. Electrophoretic method was carried out in order to deposit each spherical red (R), green(G), and blue (B) phosphor on the patterned ITO-glass. The process parameters such as bias voltage, salt concentration, and deposition time were optimized to achieve clear boundaries. It was found that the etching process of ITO combined with electrophoretic method was cost-effective, provided distinct pattern, and even reduced process steps compared with conventional processes. The application of reverse bias to the dormant electrodes while depositing the phosphors on the stripe pattern was found to be very critical for preventing the cross-contamination of each phosphor in a pixel.

• 센서학회지
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• 제32권6호
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• pp.425-431
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• 2023

An asymmetric metal-semiconductor-metal Al_0.24Ga_0.76N ultraviolet (UV) sensor was fabricated, and the effects of local Joule heating were investigated. After dielectric breakdown, the current density under a reverse bias of 2.0 V was 1.1×10^-9 A/cm², significantly lower than 1.2×10^-8 A/cm² before dielectric breakdown; moreover, the Schottky behavior of the Ti/Al/Ni/Au electrode changed to ohmic behavior under forward bias. The UV-to-visible rejection ratio (UVRR) under a reverse bias of 7.0 V before dielectric breakdown was 87; however, this UVRR significantly increased to 578, in addition to providing highly reliable responsivity. Transmission electron microscopy revealed interdiffusion between adjacent layers, with nitrogen vacancies possibly formed owing to local Joule heating at the AlGaN/Ti/Al/Ni/Au interfaces. X-ray photoelectron microscopy results revealed decreases in the peak intensities of the O 1s binding energies associated with the Ga-O bond and OH-, which act as electron-trapping states on the AlGaN surface. The reduction in dark current owing to the proposed local heating method is expected to increase the sensing performance of UV optoelectronic integrated devices, such as active-pixel UV image sensors.

• 한국전기전자재료학회논문지
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• 제19권2호
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• pp.185-188
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• 2006

We studied on the reverse twist near the pixel edge depending on the rubbing direction for the fringe field switching (FFS) mode. Liquid crystal (LC) dynamic and the transmittance near the pixel edge, where the various field directions are generated, depend on the initial rubbing direction because the position of reverse twist is decided by the angle between the electric direction and the LC director at a bias voltage. For example, when the rubbing angle is $7^{\circ}$, the reverse twist appears on the bottom position of the right sharp comer of the pixel edge so that the reverse region exists far away from main active region. But, when the rubbing angle is $-7^{\circ}$, the reverse twist appears on the top position of the right sharp comer of the pixel edge, resulting that the region becomes more close to the main active area and the unstable disclination lines (DLs) easily intrude into the active region. Therefore, it is necessary to keep the reverse twist region far from the active region and it is possible by controlling the rubbing direction in the design of a pixel electrode.

• 전기전자학회논문지
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• 제22권1호
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• pp.205-208
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• 2018

본 연구에서는 상시불통형 p-AlGaN-게이트 질화갈륨(GaN) 이종접합 트랜지스터의 신뢰성 평가를 위한 가속열화 시험 조건을 수립하기 위해 게이트 전압 열화 시험을 진행하였다. 상시불통형 트랜지스터의 동작 조건을 고려하여 기존 상시도통형 쇼트키-게이트 소자평가에 사용되는 게이트 역전압 시험과 더불어 순전압 시험을 수행하여 열화특성을 분석하였다. 기존 상시도통형 소자와 달리 상시불통형 소자에서는 게이트 역전압 시험에 의한 열화는 관찰되지 않은 반면, 게이트 순전압 시험에서 심한 열화가 관찰되었다. 상시불통형 질화갈륨 전력 반도체 소자의 신뢰성 평가에 게이트 순전압 열화 시험이 포함되어야 함을 제안한다.

• 한국진공학회지
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• 제14권4호
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• pp.229-237
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• 2005

바이어스 스트레스 인가 후에 발생하는 실리콘-게르마늄 이종접합 바이폴라 트랜지스터(SiGe HBT)의 열화현상을 고찰하였다. SiGe HBT가 바이어스 스트레스에 일정 시간 노출되면 소자 내부의 변화에 의하여 소자 파라미터가 원래 값으로부터 벗어나게 된다. 에미터-베이스 접합에 역방향 바이어스 스트레스가 걸리면 전기장에 의해 가속된 캐리어가 재결합 중심을 생성하여 베이스 전류가 증가하고 전류이득이 감소한다. $140^{\circ}C$ 이상의 온도에서 높은 에미터 전류를 흘려주는 순방향 바이어스 전류 스트레스가 가해지면 Auger recombination이나 avalancHe multiplication에 의해 형성된 핫 캐리어가 전류이득의 변동을 유발한다. 높은 에미터 전류와 콜렉터-베이스 전압이 동시에 인가되는 mixed-mode 스트레스가 가해지면 에미터-베이스 역방향 바이어스 스트레스의 경우와 마찬가지로 베이스 전류가 증가한다. 그러나 miked-mode 스트레스 인가 후에는 inverse mode Gummel 곡선에서 베이스 전류 증가가 관찰되고 perimeter-to-area(P/A) 비가 작은 소자가 심각하게 열화되는 등 에미터-베이스 역방향 바이어스 스트레스와는 근본적으로 다른 신뢰성 저하 양상이 나타난다.

• 한국전기전자재료학회논문지
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• 제11권9호
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• pp.687-692
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• 1998

Silicon doped $Al_{0.32}Ga_{0.68}As$ were growth by molecular beam epitaxy. Electroreflectance(ER) spectra of the $E_1$ transition of Schottky barrier Au/n-$Al_{0.32}Ga_{0.68}As$ have been measured at various modulation voltage($V_{ac}$) and dc bias voltage($V_{bias}$). from the $E_1$peak, band gap energy of the $Al_{0.32}Ga_{0.68}As$ is 1.883 eV which corresponds to an Al composition of 32%. As modulation voltage($V_{bias}$) is changed, a line shape at the $E_1$transition does not change, but its amplitude varies linearly. The amplitude of $E_1$signal decrease with increasing the forward dc bias voltage($V_{bias}$), but the line shape does not change. It suggests that the low field theory rather than Franz-Keldysh oscillation is Required to interpret spectra. Also, spectra at the $E_1$transition were broadened with increasing the reverse dc bias voltage($V_{bias}$) which suggests the presence of Field-induced broadening.

• 한국전기전자재료학회논문지
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• 제24권5호
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• pp.364-369
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• 2011

Analyzing electrical degradation of polycrystalline silicon transistor to applicable at several environment is very important issue. In this research, after fabricating p channel poly crystalline silicon TFT (thin film transistor) electrical characteristics were compare and analized that changed by gate bias with first measurement. As a result on and off current was reduced by variation of gate bias and especially re duce ratio of off current was reduced by $7.1{\times}10^1$. On/off current ratio, threshold voltage and electron mobility increased. Also, when channel length gets shorter on/off current ratio was increased more and thresh old voltage increased less. It was cause due to electron trap and de-trap to gate silicon oxide by variation of gate bias.

• 한국표면공학회:학술대회논문집
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• 한국표면공학회 2014년도 추계학술대회 논문집
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• pp.108-109
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• 2014

본 논문에서는 gate와 drain bias stress하에서의 a-IGZO thin-film transistors (TFTs)의 비대칭 열화 메커니즘 분석을 진행하였다. Gate와 drain bias stress하에서의 a-IGZO TFT의 열화 현상은 conduction band edge 근처에 존재하는 oxygen vacancy-related donor-like trap의 발생으로 예상되며, TFT의 channel layer 내에서의 비대칭 열화현상은 source의 metal과 a-IGZO layer간의 contact에 전압이 인가되었을 경우, reverse-biased Schottky diode에 의한 source 쪽에서의 높은 electric field가 trap generation을 가속화시킴으로써 일어나는 것임을 확인할 수 있었다.

• Transactions on Electrical and Electronic Materials
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• 제15권5호
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• pp.279-283
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• 2014

In this paper, we present an economical and practical standard to install a bypass diode in a thin-film PV module. This method helps to reduce heat generation and to prevent module degradation due to excess current from reverse bias. The experimental results confirm that for different numbers of solar cells, there is a relation between the excess reverse current and the degradation of solar cells in a-Si:H modules. The optimal number of solar cells that can be connected per bypass diode could be obtained through an analysis of the results to effectively suppress the degradation and to reduce the heat generated by the module. This technique could be expanded for use in high power crystalline Si PV modules.