• 한국산업정보학회:학술대회논문집
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• 한국산업정보학회 2002년도 춘계학술대회 논문집
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• pp.195-199
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• 2002

This paper describes the effect of substrate back bias of CMOS Inverter. When the substrate back bias applied in body, the MOS transistor threshold voltage increased and drain saturation current decreased. The back gate reverse bias or substrate bias has been widely utilized and the following advantage has suppressing subthreshold leakage, lowering parasitic junction capacitance, preventing latch up or parasitic bipolar transistor, etc. When the reverse voltage applied substrate, this paper stimulated the propagation delay time CMOS inverter.

• Transactions on Electrical and Electronic Materials
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• 제17권2호
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• pp.113-117
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• 2016

Temperature dependent reverse-bias current-voltage (I-V) characteristics in Cu Schottky contacts to oxygen plasma treated n-InP were investigated. For untreated sample, current transport mechanisms at low and high temperatures were explained by thermionic emission (TE) and TE combined with barrier lowering, respectively. For plasma treated sample, experimental I-V data were explained by TE or TE combined with barrier lowering models at low and high temperatures. However, the current transport was explained by a thermionic field emission (TFE) model at intermediate temperatures. From X-ray photoemission spectroscopy (XPS) measurements, phosphorus vacancies (VP) were suggested to be generated after oxygen plasma treatment. V_P possibly involves defects contributing to the current transport at intermediate temperatures. Therefore, minimizing the generation of these defects after oxygen plasma treatment is required to reduce the reverse-bias leakage current.

• 한국안전학회지
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• 제32권2호
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• pp.14-20
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• 2017

A numerical study was conducted to identify the predictive performance for the bare-bead thermocouple (TC) using FDS (Fire Dynamics Simulator) in simulated thermal environments of fire. A relative prediction bias of TC temperature calculated from reverse-radiation correction by FDS was evaluated with the comparison of previous experimental data. As a result, it was identified that the TC temperatures predicted by FDS were lower than the temperatures measured by bare-bead TC for the ranges of heat flux and gas temperature considered. The relative prediction bias of TC temperature by FDS was gradually increased with the increase in radiative heat flux and also significantly increased with the decrease in the gas temperature. Quantitatively, at the gas temperature of $20^{\circ}C$, the TC temperature predicted by FDS had the relative bias of approximately -20% with the radiative heat flux of $20kW/m^2$ corresponding to thermal radiation level of the flashover. It is predicted from the present study that more accurate validation of fire modeling will be possible with the quantitative prediction bias occurred in the process of reverse-radiation correction of temperature predicted by FDS.

• JSTS:Journal of Semiconductor Technology and Science
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• 제9권4호
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• pp.240-248
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• 2009

Moore's law has driven silicon technology scale down aggressively, and it results in significant increase of leakage current on nano-meter scale CMOS. Especially, in mobile devices, leakage current has been one of designers' main concerns, and thus many studies have introduced low power methodologies. However, there are few studies to minimize implementation cost in the mixed use of the methodologies to the best of our knowledge. In this paper, we introduce industrial applications of low power design methodologies for the decrease of leakage current. We focus on the design cost reduction of power gating and reverse body bias when used together. Also, we present voltage scale as an alternative to reverse body bias. To sustain gate leakage current, we discuss the adoption of high-$\kappa$ metal gate, which cuts gate leakage current by a factor of 10 in 32 nm CMOS technology. A 45 nm mobile SoC is shown as the case study of the mixed use of low power methodologies.

• 한국재료학회지
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• 제33권6호
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• pp.229-235
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• 2023

An all-perovskite oxide heterostructure composed of SrSnO₃/Nb-doped SrTiO₃ was fabricated using the pulsed laser deposition method. In-plane and out-of-plane structural characterization of the fabricated films were analyzed by x-ray diffraction with θ-2θ scans and φ scans. X-ray photoelectron spectroscopy measurement was performed to check the film's composition. The electrical transport characteristic of the heterostructure was determined by applying a pulsed dc bias across the interface. Unusual transport properties of the interface between the SrSnO₃ and Nb-doped SrTiO₃ were investigated at temperatures from 100 to 300 K. A diodelike rectifying behavior was observed in the temperature-dependent current-voltage (IV) measurements. The forward current showed the typical IV characteristics of p-n junctions or Schottky diodes, and were perfectly fitted using the thermionic emission model. Two regions with different transport mechanism were detected, and the boundary curve was expressed by ln I = -1.28V - 13. Under reverse bias, however, the temperature- dependent IV curves revealed an unusual increase in the reverse-bias current with decreasing temperature, indicating tunneling effects at the interface. The Poole-Frenkel emission was used to explain this electrical transport mechanism under the reverse voltages.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1998년도 춘계학술대회 논문집
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• pp.87-91
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• 1998

In this paper, We analyzed the current-voltage characteristics with n-type silicon substrates concentration and temperature variations (Room temperature, 50$^{\circ}C$, 75$^{\circ}C$) in platinum silicide and silicon junction. The electrical parameters of measurement are turn-on voltage, saturation current, ideality factor, barrier height, dynamic resistance in forward bias and reverse breakdown voltage according to variations of junction concentration of substrates and measurement temperature variations. As a result, the forward turn-on voltage, reverse breakdown voltage, barrier height and dynamic resistance were decreased but saturation currents and ideality factor were increased by substrates increased concentration variations in platinum silicide and n-silicon junction. In increased measurement temperature (RT, 50$^{\circ}C$, 75$^{\circ}C$), the extracted electrical parameter values of characteristics were rises by increased temperature variations according to the forward and reverse bias.

• 한국재료학회지
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• 제26권8호
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• pp.412-416
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• 2016

The electrical properties of Au/n-type Ge Schottky contacts with different contact areas were investigated using current-voltage (I-V) measurements. Analyses of the reverse bias current characteristics showed that the Poole-Frenkel effect became strong with decreasing contact area. The contribution of the perimeter current density to the total current density was found to increase with increasing reverse bias voltage. Fitting of the forward bias I-V characteristics by considering various transport models revealed that the tunneling current is dominant in the low forward bias region. The contributions of both the thermionic emission (TE) and the generation-recombination (GR) currents to the total current were similar regardless of the contact area, indicating that these currents mainly flow through the bulk region. In contrast, the contribution of the tunneling current to the total current increased with decreasing contact area. The largest $E_{00}$ value (related to tunneling probability) for the smallest contact area was associated with higher tunneling effect.

• 전자공학회논문지A
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• 제29A권9호
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• pp.56-64
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• 1992

Because of a small bandgap energy, a high doping density, and a low operating temperature, the dark current in HgCdTe photodiode is almost composed of a tunneling current. The tunneling current is devided into an indirect tunneling current via traps and a band-to-band direct tunneling current. The indirect tunneling current dominates the dark current for a relatively high temperature and a low reverse bias and forward bias. For a low temperature and a high reverse bias the direct tunneling current dominates. In this paper, to verify the tunneling currents in HgCdTe photodiode, the new tunneling-recombination equation via trap is introduced and tunneling-recombination current is calculated. The new tunneling-recombination equation via trap have the same form as SRH (Shockley-Read-Hall) generation-recombination equation and the tunneling effect is included in recombination times in this equation. Chakrabory and Biswas's equation being introduced, band to band direct tunneling current are calculated. By using these equations, HgCdTe (mole fraction, 0.29 and 0.222) photodiodes are analyzed. Then the temperature dependence of the tunneling-recombination current via trap and band to band direct tunneling current are shown and it can be known what is dominant current according to the applied bias at athe special temperature.

• 한국정보통신학회논문지
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• 제3권1호
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• pp.229-234
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• 1999

측정 온도 변화와 n-형 실리콘 기판 농도의 변화를 갖는 백금 쇼트키 다이오드에서 신뢰성 특성을 분석하였다. 신뢰성 측정분석의 파라미터는 순방향 바이어스에서 포화전류, 임계전압과 이상인자이고, 소자의 모양에 따라서 역방향 바이어스에서 항복전압이다. 소자의 모양은 가장자리 효과를 위한 긴직사각형과 정사각형이다. 결과로써, 백금과 엔-실리콘 접합 부분에서 증가된 농도에 의해 순방향 임계전압, 장벽높이와 역방향 항복전압은 감소되었지만 이상인자와 포화전류는 증가되었다. 순방향과 역방향 바이어스 하에서 신뢰성 특성의 추출된 전기적 파라미터 값들은 측정온도(실온,$50^{\circ}C$, $75^{\circ}C$)에서 더 높은 온도에서 증가되었다. 긴직사각형 소자가 가장자리 부분의 터널링 효과에 의해 역방향 항복 특성에서 정사각형 소자보다 감소되었다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 추계학술대회 논문집 전기물성,응용부문
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• pp.84-86
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• 2005

본 논문에서는 역 방향 전하공핍(reverse bias depletion)을 적용한 새로운 구조의 다결정 실리콘 박막 트랜지스터(poly-Si TFT)를 제안한다. 제안된 소자는 kink 전류 억제를 목적으로 counter-doped(p+) 영역이 채널 내로 확장되어 유효채널 폭을 감소시키는 구조이다. 감소된 채널 폭에 의하여 포화 영역의 채널 내 저항이 증가하고, 훌 전류를 통하여 kink 효과가 억제된다. 제작된 새로운 poly-Si TFT는 기존의 소자에 비해 효과적으로 kink 전류를 억제할 수 있음을 실험을 통해 검증하였다.