• 한국정보디스플레이학회:학술대회논문집
• /
• 2004.08a
• /
• pp.503-506
• /
• 2004

In this paper, we suggest a new driving waveform for stable address discharge in AC PDP without the reduction of contrast ratio. To analyze the influence of cross-talk between discharge and non-discharge cells and verify that proposed waveform shows a stable address discharge, we measured the address discharge delay time. The proposed waveform shows the reduction of the cross-talk and concurrently the improvement of address voltage margin compared with those of selective reset waveform having one reset period in 1TV-Field..

• Industrial Engineering and Management Systems
• /
• v.14 no.4
• /
• pp.372-378
• /
• 2015

In labor-intensive enterprise, such as garment factory, assembly line is widely used as a manufacturing process for reducing costs and production time. However, for the sake of the various working capacity of worker, idle or delay may happen and influence the rear processes. If these unforeseeable delay happened continuously, it may influence the whole manufacturing process and a model, which is called limited-cycle model with multiple periods (LCMwMP), is assumed to evaluate the influence risk. In order to minimize the risk, the assignment of the workers is focused on. In this paper, we deal with an assembly line as LCMwMP model when two kinds of workers exist, whose efficiency is assumed to two different groups. We consider an optimization problem for finding an assignment of workers to the line that minimizes total expected risk, which is exchanged to expected cost by reset model of LCMwMP. First, reset model as a simple model of LCMwMP is introduced. Then, some hypotheses of the rules of the optimal worker assignment are proposed and some numerical experiments are researched assuming the processing time as Erlang distribution. Finally, the other rules on other certain conditions are discussed.

• Journal of the Korean Society of Manufacturing Technology Engineers
• /
• v.8 no.4
• /
• pp.112-122
• /
• 1999

In realistic control systems the nonlinear saturation attributes of the control actuator due to physical limitations should be taken into account This nonlinear saturation of actuators may cause not only deterioration of the control performance but also a large overshoot during start-up and shut-down. As the overshoot increases the system may become oscillatory unstable. in this paper the supervisor implementation which guarantees good performance for saturation operation and prevents reset wind up is presented, Moreover the sufficient conditions of the stability for saturated system using supervisory control with a dynamic controller are provided in the continuous-time and in the discrete-time domain Numerical example is illustrated to depict the efficiency of supervisory control for a typical satuaurated production-distribution system controlled by a discrete-time dynamic controller and to validate basic results by simulation.

• Journal of the Korean Operations Research and Management Science Society
• /
• v.22 no.2
• /
• pp.99-123
• /
• 1997

Performance analysis of NTT/BT protocol is investigated, which is a GFC (Generic Flow Control) ptotocol in ATM (Asynchronous Transfer Mode ) network and is based on cyclic reset mechanism. THe mean cell delay time is proposed as a performance measure of NTT/BT protocol. The mean cell delay time is defined as the duration from the instant the cell arrives at the transmission buffer until the cell is fully transmitted. The process of cell transmission can be described as a single server queueing modle with two dependent services. By utilizing this model, mean cell delay time is obtained and sensitivity of the factors such as window size and reset period is also analysed.

• Journal of the Korea Society of Computer and Information
• /
• v.25 no.3
• /
• pp.89-96
• /
• 2020

Solar lamp systems may not operate normally in the event of some system or controller failure due to internal or external factors, in which case secondary problems occur, which may cost the system recovery. Thus, when these errors occur, a technology is needed to recover to the state it was in before the failure occurred and to enable re-execution. This paper designs and implements a system that can recover the state of the system to the state prior to the time of the error by using the Watchdog Timer within the controller if a software error has occurred inside the system, and it also proposes a technology to reset and re-execution the system through a separate reset circuit in the event of hardware failure. The proposed system provides stable operation, maintenance cost reduction and reliability of the solar lamp system by enabling the system to operate semi-permanently without external support by utilizing the automatic recovery and automatic reset function for errors that occur in the operation of the solar lamp system. In addition, it can be applied to maintain the system's constancy by utilizing the self-operation, diagnosis and recovery functions required in various high reliability applications.

• Journal of the Korea Institute of Military Science and Technology
• /
• v.9 no.4
• /
• pp.71-80
• /
• 2006

Strapdown Inertial navigation systems consist of an inertial sensor assembly(ISA), electronic modules to process sensor data, and a navigation computer to calculate attitude, velocity and position. In the ISA, most gryoscopes such as RLGs and FOGs, have digital output, but typical accelerometers use current as an analog output. For a high precision inertial navigation system, sufficient stability and resolution of the accelerometer board converting the analog accelerometer output into digital data needs to be guaranteed. To achieve this precision, the asymmetric error and A/D reset scale error of the accelerometer board must be properly compensated. If the relation between the acceleration error and the errors of boards are exactly known, the compensation and estimation techniques for the errors may be well developed. However, the A/D Reset scale error consists of a pulse-train type term with a period inversely proportional to an input acceleration additional to a proportional term, which makes it difficult to estimate. In this paper, the effects on the acceleration output for auto-pilot situations and the effects of A/D reset scale errors during horizontal alignment are qualitatively analyzed. The result can be applied to the development of the real-time compensation technique for A/D reset scale error and the derivation of the design parameters for accelerometer board.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2003.07a
• /
• pp.722-725
• /
• 2003

In AC plasma display, it is very important to quantify the wall voltage induced by the wall charge accumulated on the dielectric surface. If we know the quantities of the wall voltage in each period of every sequence; reset period, address period and sustain period, then it helps us to design the optimal driving waveform for high efficiency plasma display. We develop a new method to measure the wall voltage with VDS (Versatile Driving Simulator) system. From this method the wall voltage induced by a wall charge profiles just after the reset discharge of every cells in plasma display panel can be investigated and analyzed successfully. It is noted that the wall voltage profiles are influenced by the space charge and then they are stabilized as time goes by. It is also noted that both the remaining wall charge at the previous sequence and space charges contribute to wall voltage quantities just after the reset discharge. It is noted that the wall charges contribute dominantly after a few hundreds microseconds, while the space charges have been decayed within 100 ${\mu}s$ just after the reset discharge.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2007.08b
• /
• pp.1185-1188
• /
• 2007

The address discharge characteristics by the various scan-low and common-bias voltages are investigated based on measured address discharge time lags and $V_t$ close-curve analysis. The scan-low voltages are changed under the same voltage difference between the X and Y electrodes during an address period. As the voltage difference between the scan and address electrodes is increased during an address period, the address discharge time lag is shortened but the background luminance is increased. It is found that the improved address discharge characteristics is caused by the effect of the higher external applied voltage during an address period than the accumulated wall charges during a reset period and the high background luminance can be prevented by applying an address-bias voltage during a rising-ramp period and low reset voltage.

• 제어로봇시스템학회:학술대회논문집
• /
• 2000.10a
• /
• pp.208-208
• /
• 2000

In realistic control systems, the nonlinear salutation attributes of the control actuator due to physical limitations should be taken into account. This nonlinear saturation of actuators may cause not only deterioration of the control performance but also a large overshoot during start-up and shut-down. As the overshoot increases, the system may become oscillatory unstable. In this paper, the supervisor implementation which guarantees good performance lot saturation operation and prevents reset wind-up is presented. Moreover, the sufficient conditions of the stability for saturated systems using supervisory control with a dynamic controller are provided in the discrete-time domain. A numerical example is illustrated to depict the efficiency of supervisory control for a typical saturated production-distribution system controlled by a discrete-time dynamic controller and to validate basic results by simulation.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2000.01a
• /
• pp.121-122
• /
• 2000

The understanding of reset scheme is essential for the driving of AC PDP (Plasma Display Panel). The characteristics of reset period of AC PDP was examined with the variation of pulse time and voltage in the ADS (Address Display Separated) driving method presented by Fujitsu,. The addressing characteristics showed drastic change as a function of the erasing time and addressing pulse width. In this paper, these results were explained by the change of wall charge variation, and it was estimated with the currents through each electrode.